
KS0078 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
13) Read Busy Flag & Address
This instruction shows whether KS0078 is in internal operation or not. If the resultant BF is High, it means the internal
operation is in progress and should wait until BF to become “Low”.
which by then the next instruction can be performed. In this instruction value of address counter can also be read.
14) Write data to RAM
Write binary 8-bit data to DDRAM/CGRAM/SEGRAM.
The selection of RAM from DDRAM, CGRAM, or SEGRAM, is set by the previous address set instruction : DDRAM
address set, CGRAM address set, SEGRAM address set. RAM set instruction can also determines the AC direction to
RAM.
After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
15) Read data from RAM
Read binary 8-bit data from DDRAM/CGRAM/SEGRAM.
The selection of RAM is set by the previous address set instruction. If address set instruction of RAM is not performed before
this instruction, the data that read first is invalid, as the direction of AC is not determined. If the RAM data is read several
times without RAM address set instruction before read operation, the correct RAM data from
the second, but the first data would be incorrect, as there is no time margin to transfer RAM data. In case of DDRAM read
operation, cursor shift instruction plays the same role as DDRAM address set instruction : it also transfer RAM data to output
data register. After read operation address counter is automatically increased/decreased by 1 according to the entry mode.
After CGRAM/SEGRAM read operation, display shift may not be executed correctly.
* In case of RAM write operation, AC is increased/decreased by 1 like read operation after this. In this time, AC indicates the next
address position, but the previous data can only be read by read instruction.