參數(shù)資料
型號: KS0068B-00
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
中文描述: 16COM/60SEG驅(qū)動
文件頁數(shù): 6/22頁
文件大?。?/td> 308K
代理商: KS0068B-00
KS0068B 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
MAXIMUM ABSOLUTE LIMIT
(Ta=25
)
Characteristic
Symbol
V
DD
V
LCD
V
IN
P
D
T
OPR
T
STG
Value
-0.3~+7.0
V
DD
-11.5~V
+0.3
-0.3 ~ V
DD
+0.3
500
-30~+85
-55~+125
Unit
V
V
V
mW
Operating Voltage
Driver Supply Voltage
Input Voltage
Power Dissipation
Operating Temperature
Storage Temperature
~
Voltage greater than above may damage to the circuit (V
DD
(
V
1
(
V
2
(
V
3
(
V
4
(
V
5
)
ELECTRICAL CHARACTERISTICS
DC Characteristics
(V
DD
=+5V
10%, V
SS
=0V, T
a
=-30 ~ +85
)
Characteristic
Operating Voltage
Operating Current (*1)
Symbol
V
DD
I
DD1
Test condition
-
Ceramic resonator
fosc=250KHz
Resistor oscillation
external clock operation
fosc=270KHz
-
-
-
Min
4.5
-
Typ
-
0.65
Max
5.5
0.9
Unit
V
mA
Applicable Pin
I
DD2
-
0.45
0.7
Input Voltage 1
High
Low
High
V
IH1
V
IL1
V
IH2
2.2
-0.3
V
DD
-1.0
-0.2
2.4
-
0.9V
DD
-
-
-
V
DD
0.6
V
DD
V
E, DB
-DB
7
,
R/W, RS
OSC1
Input Voltage 2
Low
High
Low
High
V
IL2
V
OH1
V
OL1
V
OH2
-
-
-
-
-
1.0
-
0.4
-
Output Voltage 1
I
OH
=-0.205mA
I
OL
=1.2mA
I
O
=-40
à
DB
0
-DB
7
Output Voltage 2
CLK1, CLK2,
M, D
Low
COM
SEG
V
OL2
Vd
COM
Vd
SEG
I
LKG
I
IN
f
duty
t
R
t
F
f
OSC1
f
OSC2
I
O
=40
à
I
O
=
0.1mA
-
-
-
-
-
-
-
0.1V
DD
1
1
1
-250
350
55
0.2
0.2
350
255
Voltage Drop (*2)
C1-C16
S1-S60
E
RS,R/W
OSC1
Input Leakage Current
Input Low Current
External Clock
V
IN
=0 or V
DD
V
DD
=5V (test pull up R)
-
-1
-50
125
45
-
-
190
245
à
-125
250
50
-
-
270
250
Frequency(*3)
Duty
Rise time
Fall time
KHz
%
KHz
Internal Clock Frequency(*3)
Ceramic Resonator OSC Frequency
(*3)
LCD driving voltage(*4)
Rf=91K
`
2%
OSC1, OSC2
V
LCD1
V
LCD2
V
DD
-V
5
1/5 bias
1/6 bias
3.0
3.0
-
-
10.0
10.0
V
V
1
-V
5
Note: *1) Applies to the current value flown in terminal V
DD
when power is input as follows; V
DD
=5V, GND=0V, V1=3.4V,
V2=1.8V, V3=0.2V, V4=-1.4V and V5=-3V.
*2) Applied to the voltage drop occuring from terminals V
, V1, V4 and V5 to each common terminal (C1-C16) when
0.1mA is flown in or out to and from all COM and SEG terminals, and also to voltage drop occuring from terminals
V
, V2, V3 and V5 to each SEG terminal (S1-S60). When the output level is at V
, V1 or V2 level, 0.1mA is flown
out, while 0.1mA flow in when the output level is at V3, V4 or V5 level. This occurs when 5V or -5V is input to V
DD
, V1
and V3 or to V2, V4, and V5 respectively.
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