參數(shù)資料
型號: KMPC8541PXAPF
廠商: Freescale Semiconductor
文件頁數(shù): 21/88頁
文件大?。?/td> 0K
描述: IC MPU POWERQUICC III 783-FCPBGA
標準包裝: 2
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 833MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應商設備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MPC8541E PowerQUICC III Integrated Communications Processor Hardware Specification, Rev. 4.2
28
Freescale Semiconductor
Ethernet: Three-Speed, MII Management
8.2.4.2
TBI Receive AC Timing Specifications
Table 25 provides the TBI receive AC timing specifications.
Figure 13 shows the TBI receive AC timing diagram.
Figure 13. TBI Receive AC Timing Diagram
Table 25. TBI Receive AC Timing Specifications
At recommended operating conditions with LVDD of 3.3 V ± 5%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
RX_CLK clock period
tTRX
16.0
ns
RX_CLK skew
tSKTRX
7.5
8.5
ns
RX_CLK duty cycle
tTRXH/tTRX
40
60
%
RCG[9:0] setup time to rising RX_CLK
tTRDVKH
2.5
ns
RCG[9:0] hold time to rising RX_CLK
tTRDXKH
1.5
ns
RX_CLK clock rise time and fall time
tTRXR, tTRXF
2,3
0.7
2.4
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state)
(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tTRDVKH
symbolizes TBI receive timing (TR) with respect to the time data input signals (D) reach the valid state (V) relative to the
tTRX clock reference (K) going to the high (H) state or setup time. Also, tTRDXKH symbolizes TBI receive timing (TR) with
respect to the time data input signals (D) went invalid (X) relative to the tTRX clock reference (K) going to the high (H) state.
Note that, in general, the clock reference symbol representation is based on three letters representing the clock of a
particular functional. For example, the subscript of tTRX represents the TBI (T) receive (RX) clock. For rise and fall times,
the latter convention is used with the appropriate letter: R (rise) or F (fall). For symbols representing skews, the subscript is
skew (SK) followed by the clock that is being skewed (TRX).
2. Guaranteed by design.
RX_CLK1
RXD[9:0]
tTRX
tTRXH
tTRXR
tTRXF
tTRDVKH
RX_CLK0
tTRDXKH
tTRDVKH
tTRDXKH
tSKTRX
tTRXH
Valid Data
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