參數(shù)資料
型號(hào): KMPC8315EVRAGDA
廠(chǎng)商: Freescale Semiconductor
文件頁(yè)數(shù): 38/106頁(yè)
文件大?。?/td> 0K
描述: IC MPU POWERQUICC II 620-PBGA
標(biāo)準(zhǔn)包裝: 2
系列: MPC83xx
處理器類(lèi)型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 620-BBGA 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 620-PBGA(29x29)
包裝: 托盤(pán)
MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
37
Ethernet: Three-Speed Ethernet, MII Management
9.5.4
SGMII AC Timing Specifications
This section describes the SGMII transmit and receive AC timing specifications. Transmitter and receiver
characteristics are measured at the transmitter outputs (TX[n] and TX[n]) or at the receiver inputs (RX[n]
and RX[n]) as depicted in Figure 21 respectively.
9.5.4.1
SGMII Transmit AC Timing Specifications
This table provides the SGMII transmit AC timing targets. A source synchronous clock is not provided.
9.5.4.2
SGMII Receive AC Timing Specifications
This table provides the SGMII receive AC timing specifications. Source synchronous clocking is not
supported. Clock is recovered from the data. Figure 20 shows the SGMII Receiver Input Compliance
Mask eye diagram.
Input AC common mode voltage
VCM_ACp-p
100
mV
5
Receiver differential input impedance
ZRX_DIFF
80
100
120
Receiver common mode input
impedance
ZRX_CM
20
35
Common mode input voltage
VCM
—Vxcorevss
—V
6
Note:
1. Input must be externally AC-coupled.
2. VRX_DIFFp-p is also referred to as peak to peak input differential voltage
3. The concept of this parameter is equivalent to the Electrical Idle Detect Threshold parameter in PCI Express. Refer to PCI
Express Differential Receiver (RX) Input Specifications section for further explanation.
4. The EQ shown in the table refers to the RXEQA or RXEQE bit field of MPC8315E’s SerDes Control Register 0.
5. VCM_ACp-p is also referred to as peak to peak AC common mode voltage.
6. On-chip termination to XCOREVSS.
Table 37. SGMII Transmit AC Timing Specifications
At recommended operating conditions with XCOREVDD = 1.0V ± 5%.
Parameter
Symbol
Min
Typ
Max
Unit
Note
Deterministic Jitter
JD
0.17
UI p-p
Total Jitter
JT
0.35
UI p-p
Unit Interval
UI
799.92
800
800.08
ps
VOD fall time (80%-20%)
tfall
50
120
ps
VOD rise time (20%-80%)
trise
50
120
ps
Note:
1. Each UI is 800 ps ± 100 ppm.
Table 36. SGMII DC Receiver Electrical Characteristics (continued)
Parameter
Symbol
Min
Typ
Max
Unit
Note
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