參數(shù)資料
型號： KMPC8280CZUQLDA
廠商： Freescale Semiconductor
文件頁數(shù)： 31/83頁
文件大?。?/td> 0K
描述： IC MPU PWRQUICC II HIP7 480-TBGA
標(biāo)準(zhǔn)包裝： 2
系列： MPC82xx
處理器類型： 32-位 MPC82xx PowerQUICC II
速度： 333MHz
電壓： 1.5V
安裝類型： 表面貼裝
封裝/外殼： 480-LBGA
供應(yīng)商設(shè)備封裝： 408-TBGA（37.5x37.5）
包裝： 托盤
MPC8280 PowerQUICC II Family Hardware Specifications, Rev. 2
Freescale Semiconductor
37
Clock Configuration Modes
7.3
PCI Agent Mode
These tables show configurations for PCI agent mode. The frequency values listed are for the purpose of
illustration only. Users must select a mode and input bus frequency so that the resulting configuration does
not exceed the frequency rating of the user’s device. Note that in PCI agent mode the following:
1101_001
50.0
100.0
2.5
125.0 250.0
3.5
175.0 350.0
5
25.0
50.0
1101_010
50.0
100.0
2.5
125.0 250.0
4
200.0 400.0
5
25.0
50.0
1101_011
50.0
100.0
2.5
125.0 250.0
4.5
225.0 450.0
5
25.0
50.0
1101_100
50.0
100.0
2.5
125.0 250.0
5
250.0 500.0
5
25.0
50.0
1101_101
62.5
125.0
2
125.0 250.0
3
187.5 375.0
5
25.0
50.0
1101_110
62.5
125.0
2
125.0 250.0
4
250.0 500.0
5
25.0
50.0
1110_000
50.0
100.0
3
150.0 300.0
3.5
175.0 350.0
6
25.0
50.0
1110_001
50.0
100.0
3
150.0 300.0
4
200.0 400.0
6
25.0
50.0
1110_010
50.0
100.0
3
150.0 300.0
4.5
225.0 450.0
6
25.0
50.0
1110_011
50.0
100.0
3
150.0 300.0
5
250.0 500.0
6
25.0
50.0
1110_100
50.0
100.0
3
150.0 300.0
5.5
275.0 550.0
6
25.0
50.0
1100_000
Reserved
1100_001
Reserved
1100_010
Reserved
1 The “l(fā)ow” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry
guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only.
Users must select a mode and input bus frequency so that the resulting configuration does not violate the frequency rating of
the user’s device. The minimum CPM frequency is 120 MHz. Minimum CPU frequency is determined by the clock mode. For
modes with a CPU multiplication factor <= 3, the minimum CPU frequency is 150 MHz for commercial temperature devices and
175 MHz for extended temperature devices. For modes with a CPU multiplication factor >= 3.5: for Rev0.1 the minimum CPU
frequency is 250 MHz; for Rev A or later the minimum CPU frequency is 150 MHz for commercial temperature devices and 175
MHz for extended temperature devices.
2 As Table 17 shows, PCI_MODCK determines the PCI clock frequency range. See Table 20 for higher configurations.
3 MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.
4 60x and local bus frequency. Identical to CLKIN.
5 CPM multiplication factor = CPM clock/bus clock
6 CPU multiplication factor = Core PLL multiplication factor
Table 20. Clock Configurations for PCI Host Mode (PCI_MODCK=1)1,2 (continued)
Mode3
Bus Clock4
(MHz)
CPM
Multiplication
Factor5
CPM Clock
(MHz)
CPU
Multiplication
Factor6
CPU Clock
(MHz)
PCI
Division
Factor
PCI Clock
(MHz)
MODCK_H-
MODCK[1-3]
Low
High
Low
High
Low
High
Low High
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