參數(shù)資料
型號(hào): KMC7448HX1700LC
廠商: Freescale Semiconductor
文件頁數(shù): 52/60頁
文件大?。?/td> 0K
描述: IC MPU 128BIT 1700MHZ 360-FCCBGA
標(biāo)準(zhǔn)包裝: 1
系列: MPC74xx
處理器類型: 32-位 MPC74xx PowerPC
速度: 1.7GHz
電壓: 1.3V
安裝類型: 表面貼裝
封裝/外殼: 360-BCBGA,F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝: 360-FCCBGA(25x25)
包裝: 托盤
MPC7448 RISC Microprocessor Hardware Specifications, Rev. 4
56
Freescale Semiconductor
Document Revision History
2
Table 6: Added separate input leakage specification for BVSEL0, LSSD_MODE, TCK, TDI, TMS, TRST
signals to correctly indicate leakage current for signals with internal pull-up resistors.
Section 5.1: Added paragraph preceding Table 7 and edited notes in Table 7 to clarify core frequencies at
which power consumption is measured.
Section 5.3: Removed voltage derating specifications; this feature has been made redundant by new
device offerings and is no longer supported.
Changed names of “Typical–Nominal” and “Typical–Thermal” power consumption parameters to “Typical”
and “Thermal”, respectively. (Name change only–no specifications were changed.)
Table 11: Revised Notes 16, 18, and 19 to reflect current recommendations for connection of SENSE pins.
Section 9.3: Added paragraph explaining connection recommendations for SENSE pins. (See also Table
11 entry above.)
Table 19: Updated table to reflect changes in specifications for MC7448xxnnnnNC devices.
Table 9: Changed all instances of TT[0:3] to TT[0:4]
Removed mention of these input signals from output valid times and output hold times:
AACK, CKSTP_IN, DT[0:3]
Figure 17: Modified diagram slightly to correctly show constraint on SYSCLK ramping is related to VDD
voltage, not AVDD voltage. (Diagram clarification only; no change in power sequencing requirements.)
Added Table 20 to reflect introduction of extended temperature devices and associated hardware
specification addendum.
1
Added 1600 MHz, 1420 MHz, and 1000 MHz devices
Section 4: corrected die size
Table 2: Revised Note 4 to consider overshoot/undershoot and combined with Note 5.
Table 4: Revised operating voltage for 1700 MHz device from ± 50 mV to +20 mV / –50 mV.
Table 7: Updated and expanded table to include Typical – Nominal power consumption.
Table 11: Added voltage derating information for 1700 MHz devices; this feature is not supported at this
time for other speed grades.
Added transient specifications for VDD power supply in Section 9.2.3, added Table 15 and Figure 19 and
renumbered subsequent tables and figures.
Moved Decoupling Recommendations from Section 9.4 to Section 9.2.4 and renumbered subsequent
sections.
Section 9.2.1: Revised power sequencing requirements.
Section 9.7.4: Added thermal diode ideality factor information (previously TBD).
Table 17: Expanded table to show HID1 register values when DFS modes are enabled.
Section 11.2: updated to include additional N-spec device speed grades
Tables 18 and 19: corrected PVR values and added “MC” product code prefix
0
Initial public release.
Table 17. Document Revision History (continued)
Revision
Date
Substantive Change(s)
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