參數(shù)資料
型號: KM68FR1000Z
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128Kx8 Bit Super Low Power and Low Voltage Full CMOS SRAM(128K x 8位超低功耗和低電壓CMOS 靜態(tài) RAM)
中文描述: 128Kx8位超級低功耗和低電壓的CMOS SRAM的全部(128K的× 8位超低功耗和低電壓的CMOS靜態(tài)RAM)的
文件頁數(shù): 7/12頁
文件大小: 133K
代理商: KM68FR1000Z
Revision 1.0
CMOS SRAM
April 1997
KM68FS1000Z, KM68FR1000Z Family
Preliminary
AC CHARACTERISTICS
Parameter List
Symbol
Speed Bins
Units
100ns
150ns
300ns
Min
Max
Min
Max
Min
Max
Read Read cycle time
t
RC
100
-
150
-
300
-
ns
Address access time
t
AA
-
100
-
150
-
300
ns
Chip select to output
t
CO1
-
100
-
150
-
300
ns
Output enable to valid output
t
OE
-
50
-
75
-
150
ns
Chip select to low-Z output
t
LZ1,
t
LZ2
10
-
20
-
50
-
ns
Output enable to low-Z output
t
OLZ
5
-
20
-
30
-
ns
Chip disable to high-Z output
t
HZ1,
t
HZ2
0
30
0
40
0
60
ns
Output disable to high-Z output
t
OHZ
0
30
0
40
0
60
ns
Output hold from address change
t
OH
15
-
15
-
30
-
ns
Write
Write cycle time
t
WC
100
-
150
-
300
-
ns
Chip select to end of write
t
CW
80
-
120
-
300
-
ns
Address set-up time
t
AS
0
-
0
-
0
-
ns
Address valid to end of write
t
AW
80
-
120
-
300
-
ns
Write pulse width
t
WP
70
-
100
-
200
-
ns
Write recovery
t
WR
0
-
0
-
0
-
ns
Write to output high-Z
t
WHZ
0
30
0
40
0
60
ns
Data to write time overlap
t
DW
40
-
60
-
120
-
ns
Data hold from write time
t
DH
0
-
0
-
0
-
ns
End write to output low-Z
t
OW
5
-
5
-
20
-
ns
相關(guān)PDF資料
PDF描述
KM68FS1000Z 128Kx8 Bit Super Low Power and Low Voltage Full CMOS SRAM(128K x 8位超低功耗和低電壓CMOS 靜態(tài) RAM)
KM68FR1000 128K x8 Bit Super Low Power and Low Voltage Full CMOS Static RAM(128K x 8位超低功耗和低電壓CMOS 靜態(tài) RAM)
KM68FS1000 128K x8 Bit Super Low Power and Low Voltage Full CMOS Static RAM(128K x 8位超低功耗和低電壓CMOS 靜態(tài) RAM)
KM68FV1000 128K x8 Bit Super Low Power and Low Voltage Full CMOS Static RAM(128K x 8位超低功耗和低電壓CMOS 靜態(tài) RAM)
KM68FR2000 256Kx8 Bit Super Low Power and Low Voltage Full CMOS Static RAM(256K x 8位超低功耗和低電壓CMOS 靜態(tài) RAM)
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