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參數(shù)資料
| 型號(hào)： | KM681002AI-15 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | JT 26C 26#20 PIN WALL RECP |
| 中文描述： | 128Kx8高速靜電RAM5V工作，革命頻出。在經(jīng)營(yíng)商業(yè)和工業(yè)溫度范圍。 |
| 文件頁(yè)數(shù)： | 7/9頁(yè) |
| 文件大?。?/td> | 171K |
| 代理商： | KM681002AI-15 |
KM681002A, KM681002AI
CMOS SRAM
PRELIMINARY
Rev 4.0
- 7 -
Ferruary 1998
NOTES
(WRITE CYCLE)
1. All write cycle timing is referenced from the last valid address to the first transition address.
2. A write occurs during the overlap of a low CS and WE. A write begins at the latest transition CS going low and WE going low
A write ends at the earliest transition CS going high or WE going high. t
WP
is measured from the beginning of write to the end of
write.
3. t
CW
is measured from the later of CS going low to end of write.
4. t
AS
is measured from the address valid to the beginning of write.
5. t
WR
is measured from the end of write to the address change. t
WR
applied in case a write ends as CS or WE going high.
6. If OE, CS and WE are in the Read Mode during this period, the I/O pins are in the output low-Z state. Inputs of opposite phase
of the output must not be applied because bus contention can occur.
7. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycle.
8. If CS goes low simultaneously with WE going or after WE going low, the outputs remain high impedance state.
9. Dout is the read data of the new address.
10. When CS is low : I/O pins are in the output state. The input signals in the opposite phase leading to the output should not be
applied.
FUNCTIONAL DESCRIPTION
* NOTE : X means Don
′
t Care.
CS
WE
OE
Mode
I/O Pin
Supply Current
H
X
X*
Not Select
High-Z
I
SB
, I
SB1
L
H
H
Output Disable
High-Z
I
CC
L
H
L
Read
D
OUT
I
CC
L
L
X
Write
D
IN
I
CC
TIMING WAVEFORM OF WRITE CYCLE(3)
(CS
=
Controlled)
Address
CS
t
AW
t
DW
t
DH
Data Valid
WE
Data in
Data out
High-Z
High-Z(8)
t
CW(3)
t
WP(2)
t
AS(4)
t
WC
t
WR(5)
High-Z
High-Z
t
LZ
t
WHZ(6)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KM681002A-12 | 128Kx8 High Speed Static RAM5V Operating, Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range. |
| KM681002A-15 | 128Kx8 High Speed Static RAM5V Operating, Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range. |
| KM681002A-20 | 128Kx8 High Speed Static RAM5V Operating, Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range. |
| KM681002AI-20 | 128Kx8 High Speed Static RAM5V Operating, Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range. |
| KM681002AJ-12 | 128Kx8 High Speed Static RAM5V Operating, Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range. |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM681002AI-20 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Kx8 High Speed Static RAM5V Operating, Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range. |
| KM681002AJ-12 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Kx8 High Speed Static RAM5V Operating, Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range. |
| KM681002AJ15 | 制造商:Samsung Semiconductor 功能描述: |
| KM681002AJ-15 | 制造商:Samsung Semiconductor 功能描述: |
| KM681002B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Kx8 Bit High Speed Static RAM(5V Operating), Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range. |
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