參數(shù)資料
型號(hào): KM681000C
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128K x8 bit Low Power CMOS Static RAM(128K x8位低功耗 CMOS 靜態(tài) RAM)
中文描述: 128K的x8位低功耗CMOS靜態(tài)RAM(128K的x8位低功耗的CMOS靜態(tài)RAM)的
文件頁(yè)數(shù): 4/10頁(yè)
文件大?。?/td> 175K
代理商: KM681000C
PRELIMINARY
KM681000C Family
CMOS SRAM
Revision 2.0
November 1997
4
RECOMMENDED DC OPERATING CONDITIONS
1)
Note
1. Commercial Product : T
A
=0 to 70
°
C and Industrial Product :T
A
=-40 to 85
°
C, otherwise specified.
2. Overshoot : Vcc+3.0V for
30ns pulse width.
3. Undershoot : -3.0V for
30ns pulse width.
4. Overshoot and undershoot are sampled, not 100% tested.
Item
Symbol
Min
Typ
Max
Unit
Supply voltage
Vcc
4.5
5.0
5.5
V
Ground
Vss
0
0
0
V
Input high voltage
V
IH
2.2
-
Vcc+0.5
2)
V
Input low voltage
V
IL
-0.5
3)
-
0.8
V
CAPACITANCE
1
)
(f=1MHz, T
A
=25
°
C)
1. Capacitance is sampled not, 100% tested.
Item
Symbol
Test Condition
Min
Max
Unit
Input capacitance
C
IN
V
IN
=0V
-
6
pF
Input/Output capacitance
C
IO
V
IO
=0V
-
8
pF
DC AND OPERATING CHARACTERISTICS
Item
Symbol
Test Conditions
Min
Typ
Max
Unit
Input leakage current
I
LI
V
IN
=Vss to Vcc
-1
-
1
μ
A
μ
A
Output leakage current
I
LO
CS
1
=V
IH
or CS
2
=V
IL
or OE=V
IH
or
WE=V
IL,
V
IO
=Vss to Vcc
-1
-
1
Operating power supply current
I
CC
I
IO
=0mA, CS
1
=V
IL
, CS
2
=V
IH
, V
IN
=V
IH
or V
IL
, Read
-
5
10
mA
Average operating current
I
CC1
Cycle time=1
μ
s, 100% duty, I
IO
=0mA, CS
1
0.2V,
CS
2
V
CC
-0.2V, V
IN
0.2V or V
IN
V
CC
-0.2V
Read
-
2
5
mA
Write
20
35
I
CC2
Cycle time=Min, 100% duty, I
IO
=0mA, CS1=V
IL
, CS2=V
IH,
V
IN
=V
IL
or V
IH
-
45
60
mA
Output low voltage
V
OL
I
OL
=2.1mA
-
-
0.4
V
Output high voltage
V
OH
I
OH
=-1.0mA
2.4
-
-
V
Standby Current(TTL)
I
SB
CS
1
=V
IH,
CS
2
=V
IL,
Other input=V
IL
or V
IH
-
-
3
mA
Standby
Current
(CMOS)
KM681000CL
I
SB1
CS
1
Vcc-0.2V, CS2
Vcc-0.2V
or CS
2
0.2V
Other input =0~Vcc
Low Power
-
1
50
μ
A
KM681000CL-L
Low Low Power
-
0.3
10
KM681000CLI
Low power
-
1
50
KM681000CLI-L
Low Low Power
-
0.3
15
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