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參數(shù)資料
| 型號(hào)： | KM62256DLG-7 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Kx8 bit Low Power CMOS Static RAM |
| 中文描述： | 32Kx8位低功耗CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 2/9頁(yè) |
| 文件大?。?/td> | 170K |
| 代理商： | KM62256DLG-7 |
KM62256D Family
CMOS SRAM
Revision 1.0
November 1997
32Kx8 bit Low Power CMOS Static RAM
GENERAL DESCRIPTION
The KM62256D families are fabricated by SAMSUNG
′
s
advanced CMOS process technology. The families support
various operating temperature ranges and have various
package types for user flexibility of system design. The fami-
lies also support low data retention voltage for battery back-
up operation with low data retention current.
FEATURES
Process Technology : TFT
Organization : 32Kx8
Power Supply Voltage : 4.5~5.5V
Low Data Retention Voltage : 2V(Min)
Three state output and TTL Compatible
Package Type : 28-DIP-600B, 28-SOP-450
28-TSOP1-0813.4 F/R
PIN DESCRIPTION
Pin Name
Function
Pin Name
Function
CS
Chip Select Input
I/O
1
~I/O
8
Data Inputs/Outputs
OE
Output Enable Input
Vcc
Power
WE
Write Enable Input
Vss
Ground
A
0
~A
14
Address Inputs
NC
No connect
PRODUCT FAMILY
1. The parameter is tested with 50pF test load.
Product Family
Operating Temperature
V
CC
Range
Speed
Power Dissipation
PKG Type
Standby
(I
SB1
, Max)
30
μ
A
5
μ
A
30
μ
A
Operating
(Icc
2,
Max)
KM62256DL
Commercial (0~70
°
C)
4.5 to 5.5V
55
1)
/70ns
60mA
28-DIP,28-SOP
28-TSOP1-F/R
KM62256DL-L
KM62256DLI
Industrial (-40~85
°
C)
70ns
28-SOP
28-TSOP1-F/R
KM62256DLI-L
5
μ
A
FUNCTIONAL BLOCK DIAGRAM
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
VCC
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
28-DIP
28-SOP
15
16
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
28-TSOP
Type1 - Forward
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
28
25
24
23
22
21
20
19
18
17
16
15
OE
28-TSOP
Type1 - Reverse
A11
A9
A8
A13
WE
VCC
A3
A4
A14
A12
A7
A6
A5
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
28
25
24
23
22
21
20
19
18
17
16
15
OE
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
Precharge circuit.
Memory array
256 rows
128
×8
columns
I/O Circuit
Column select
Clk gen.
Row
select
A10
A3
A0
A1
A2
A11
A9
A13
A8
A12
A14
A4
A5
A7
CS
WE
I/O
1
Data
cont
Data
cont
OE
I/O
8
A6
Control
Logic
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KM62256DLG-7L | 32Kx8 bit Low Power CMOS Static RAM |
| KM62256DLGI-7 | 32Kx8 bit Low Power CMOS Static RAM |
| KM68U1000BLTE-10 | 128K X 8bit Low Power and Low Voltage CMOS Statinc RAM |
| KM68U1000B | 128K X 8bit Low Power and Low Voltage CMOS Statinc RAM |
| KM68U1000BL | 128K X 8bit Low Power and Low Voltage CMOS Statinc RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM62256DLG-7L | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:32Kx8 bit Low Power CMOS Static RAM |
| KM62256DLGI7 | 制造商:SEC 功能描述: |
| KM62256DLGI-7 | 制造商:SAMSG 功能描述: |
| KM62256DLGI-7L | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:32Kx8 bit Low Power CMOS Static RAM |
| KM62256DLP-5 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:32Kx8 bit Low Power CMOS Static RAM |
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