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參數(shù)資料
| 型號(hào)： | KM62256DLG-5L |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Kx8 bit Low Power CMOS Static RAM |
| 中文描述： | 32Kx8位低功耗CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 170K |
| 代理商： | KM62256DLG-5L |
KM62256D Family
CMOS SRAM
Revision 1.0
November 1997
Address
Data Out
Previous Data Valid
Data Valid
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1)
(Address Controlled
,
CS=OE=V
IL
, WE=V
IH
)
t
AA
t
RC
t
OH
TIMING WAVEFORM OF READ CYCLE(2)
(WE=V
IH
)
Data Valid
High-Z
CS
Address
OE
Data ou
t
NOTES (
READ CYCLE)
1.
t
HZ
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
levels.
2. At any given temperature and voltage condition,
t
HZ
(Max.) is less than
t
LZ
(Min.) both for a given device and from device to device
interconnection.
t
OH
t
AA
t
OLZ
t
LZ
t
OHZ
t
HZ
t
RC
t
OE
t
CO
相關(guān)PDF資料 |
PDF描述 |
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| KM62256DLG-7 | 32Kx8 bit Low Power CMOS Static RAM |
| KM62256DLG-7L | 32Kx8 bit Low Power CMOS Static RAM |
| KM62256DLGI-7 | 32Kx8 bit Low Power CMOS Static RAM |
| KM68U1000BLTE-10 | 128K X 8bit Low Power and Low Voltage CMOS Statinc RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM62256DLG-7 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:32Kx8 bit Low Power CMOS Static RAM |
| KM62256DLG-7L | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:32Kx8 bit Low Power CMOS Static RAM |
| KM62256DLGI7 | 制造商:SEC 功能描述: |
| KM62256DLGI-7 | 制造商:SAMSG 功能描述: |
| KM62256DLGI-7L | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:32Kx8 bit Low Power CMOS Static RAM |
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