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參數(shù)資料
| 型號(hào)： | KM62256CLG-5L |
| 廠(chǎng)商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Kx8 bit Low Power CMOS Static RAM |
| 中文描述： | 32Kx8位低功耗CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 7/10頁(yè) |
| 文件大小： | 162K |
| 代理商： | KM62256CLG-5L |
PRELIMINARY
CMOS SRAM
Revision 3.0
April 1996
KM62256C Family
Address
Data Out
Previous Data Valid
Data Valid
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE (1)
(Address Controlled)
( CS=OE=V
IL
, WE=V
IH
)
TIMING WAVEFORM OF READ CYCLE(2)
IH
)
Data Valid
High-Z
CS
Address
OE
Data ou
t
NOTES
(READ CYCLE)
1.
t
HZ and
t
OHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels.
2. At any given temperature and voltage condition,
t
HZ(max.) is less than
t
LZ(min.) both for a given device and from device to device.
t
RC
t
RC
t
OH
t
OH
t
AA
t
OE
t
OLZ
t
LZ
t
OHZ
t
HZ
t
AA
t
CO
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM62256CLG7 | 制造商:SAM 功能描述:62256 SURFACE MT |
| KM62256CLG-7 | 制造商:SAM 功能描述:62256 SURFACE MT |
| KM62256CLG7L | 制造商:SAMSUNG 功能描述:* |
| KM62256CLG-7L | 制造商:Samsung Semiconductor 功能描述: |
| KM62256CLGE-10 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:32Kx8 bit Low Power CMOS Static RAM |
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