參數(shù)資料
型號: KM48V8000B
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 8M x 8Bit CMOS Dynamic RAM with Fast Page Mode(8M x 8位 CMOS 動態(tài)RAM(帶快速頁模式))
中文描述: 8米× 8位的快速頁面模式的CMOS動態(tài)RAM(8米× 8位的CMOS動態(tài)隨機(jī)存儲器(帶快速頁模式))
文件頁數(shù): 6/20頁
文件大?。?/td> 322K
代理商: KM48V8000B
KM48V8000B,
KM48V8100B
CMOS DRAM
AC CHARACTERISTICS
(Continued)
Parameter
Symbol
-45
-5
-6
Units
Note
Min
Max
Min
Max
Min
Max
Refresh period (Normal)
t
REF
t
REF
t
WCS
t
CWD
t
RWD
t
AWD
t
CPWD
t
CSR
t
CHR
t
RPC
t
CPA
t
PC
t
PRWC
t
CP
t
RASP
t
RHCP
t
OEA
t
OED
t
OEZ
t
OEH
t
WTS
t
WTH
t
WRP
t
WRH
t
RASS
t
RPS
t
CHS
64
64
64
ms
Refresh period (L-ver)
128
128
128
ms
Write command set-up time
0
0
0
ns
7
CAS to W delay time
32
36
38
ns
7
RAS to W delay time
67
73
83
ns
7
Column address to W delay time
43
48
53
ns
7
CAS precharge W delay time
48
53
60
ns
CAS set-up time (CAS -before-RAS refresh)
5
10
10
ns
CAS hold time (CAS -before-RAS refresh)
10
5
5
ns
RAS to CAS precharge time
5
5
5
ns
Access time from CAS precharge
26
30
35
ns
3
Fast Page mode cycle time
31
35
40
ns
Fast Page mode read-modify-write cycle time
70
76
85
ns
CAS precharge time (Fast page cycle)
9
10
10
ns
RAS pulse width (Fast page cycle)
45
200K
50
200K
60
200K
ns
RAS hold time from CAS precharge
28
30
35
ns
OE access time
12
13
15
ns
OE to data delay
12
13
13
ns
Output buffer turn off delay time from OE
0
13
0
13
0
13
ns
6
OE command hold time
12
13
15
ns
Write command set-up time (Test mode in)
10
10
10
ns
11
Write command hold time (Test mode in)
15
15
15
ns
11
W to RAS precharge time (C-B-R refresh)
10
10
10
ns
W to RAS hold time (C-B-R refresh)
10
10
10
ns
RAS pulse width (C-B-R self refresh)
100
100
100
us
13,14,15
RAS precharge time (C-B-R self refresh)
80
90
110
ns
13,14,15
CAS hold time (C-B-R self refresh)
-50
-50
-50
ns
13,14,15
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