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參數(shù)資料
| 型號： | KM48V2100C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2M x 8Bit CMOS Dynamic RAM with Fast Page Mode(2M x 8位CMOS 動(dòng)態(tài)RAM(帶快速頁模式)) |
| 中文描述： | 200萬× 8位的快速頁面模式的CMOS動(dòng)態(tài)RAM（2米× 8位的CMOS動(dòng)態(tài)隨機(jī)存儲(chǔ)器（帶快速頁模式）） |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 321K |
| 代理商： | KM48V2100C |
KM48C2000C, KM48C2100C
KM48V2000C, KM48V2100C
CMOS DRAM
TEST MODE CYCLE
Parameter
Symbol
-5
-6
Units
Notes
Min
Max
Min
Max
Random read or write cycle time
t
RC
t
RWC
t
RAC
t
CAC
t
AA
t
RAS
t
CAS
t
RSH
t
CSH
t
RAL
t
CWD
t
RWD
t
AWD
t
CPWD
t
PC
t
PRWC
t
RASP
t
CPA
t
OEA
t
OED
t
OEH
95
115
ns
Read-modify-write cycle time
138
160
ns
Access time from RAS
55
65
ns
3,4,10,12
Access time from CAS
18
20
ns
3,4,5,12
Access time from column address
30
35
ns
3,10,12
RAS pulse width
55
10K
65
10K
ns
CAS pulse width
18
10K
20
10K
ns
RAS hold time
18
20
ns
CAS hold time
55
65
ns
Column address to RAS lead time
30
35
ns
CAS to W delay time
41
45
ns
7
RAS to W delay time
78
90
ns
7
Column address to W delay time
53
60
ns
7
CAS precharge to W delay time
58
65
ns
Fast Page cycle time
40
45
ns
Fast Page read-modify-write cycle time
81
90
ns
RAS pulse width (Fast Page cycle)
55
200K
65
200K
ns
Access time from CAS precharge
35
40
ns
3
OE access time
18
20
ns
OE to data delay
18
20
ns
OE command hold time
18
20
ns
( Note 11 )
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相關(guān)代理商/技術(shù)參數(shù) |
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| KM48V2104CS-L6 | 制造商:Samsung Semiconductor 功能描述: |
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| KM48V8104B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 8bit CMOS Dynamic RAM with Extended Data Out |
| KM48V8104C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 8bit CMOS Dynamic RAM with Extended Data Out |
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