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參數(shù)資料
| 型號： | KM416C4004B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4M x 16bit CMOS Dynamic RAM with Extended Data Out(4M x 16位 CMOS 動(dòng)態(tài)RAM（帶擴(kuò)展數(shù)據(jù)輸出）) |
| 中文描述： | 4米× 16位的擴(kuò)展數(shù)據(jù)輸出的CMOS動(dòng)態(tài)RAM（4米× 16位的CMOS動(dòng)態(tài)隨機(jī)存儲器（帶擴(kuò)展數(shù)據(jù)輸出）） |
| 文件頁數(shù)： | 1/36頁 |
| 文件大小： | 792K |
| 代理商： | KM416C4004B |
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KM416C4004B,
KM416C4104B
CMOS DRAM
This is a family of 4,194,304 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6) are optional features of this
family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 4Mx16 EDO Mode DRAM
family is fabricated using Samsung
′
s advanced CMOS process to realize high band-width, low power consumption and high reliability.
Part Identification
- KM416C4004B(5.0V, 8K Ref.)
- KM416C4104B(5.0V, 4K Ref.)
Extended Data Out Mode operation
2 CAS Byte/Word Read/Write operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Fast parallel test mode capability
TTL(5.0V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in Plastic TSOP(II) package
+5.0V
±
10% power supply
Control
Clocks
Lower
Data out
Buffer
RAS
UCAS
LCAS
W
Vcc
Vss
DQ0
to
DQ7
A0~A12
(A0~A11)*1
A0~A8
(A0~A9)*1
Memory Array
4,194,304 x 16
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
4M x 16bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Note) *1 : 4K Refresh
Refresh Cycles
Part
NO.
Refresh
cycle
Refresh time
Normal
KM416C4004B*
KM416C4104B
8K
4K
64ms
Performance Range
Speed
-45
-5
-6
t
RAC
45ns
50ns
60ns
t
CAC
12ns
13ns
15ns
t
RC
74ns
84ns
104ns
t
HPC
17ns
20ns
25ns
Active Power Dissipation
Speed
-45
-5
-6
8K
550
495
440
4K
715
660
605
Unit :
mW
S
Upper
Data in
Buffer
Upper
Data out
Buffer
Lower
Data in
Buffer
DQ
8
to
DQ15
OE
*
Access mode & RAS only refresh mode
: 8K cycle/64ms
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms
Row Decoder
Column Decoder
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM416C4004C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 16bit CMOS Dynamic RAM with Extended Data Out |
| KM416C4100B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 16bit CMOS Dynamic RAM with Fast Page Mode |
| KM416C4100BS-6 | 制造商:Samsung Semiconductor 功能描述: 制造商:Samsung Electro-Mechanics 功能描述:4M X 16 FAST PAGE DRAM, 60 ns, 50 Pin Plastic SMT |
| KM416C4100C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 16bit CMOS Dynamic RAM with Fast Page Mode |
| KM416C4104C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 16bit CMOS Dynamic RAM with Extended Data Out |
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