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參數(shù)資料
| 型號： | KM23V8105D |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM |
| 中文描述： | 800萬位（1Mx8 / 512Kx16）的CMOS掩膜ROM |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 91K |
| 代理商： | KM23V8105D |
KM23V8105D(G)
CMOS MASK ROM
Pin Name
Pin Function
A
0
- A
1
Page Address Inputs
A
- A
18
Address Inputs
Q
0
- Q
14
Data Outputs
Q
15
/A
-1
Output 15(Word mode)/
LSB Address(Byte mode)
BHE
Word/Byte selection
CE
Chip Enable
OE
Output Enable
V
CC
Power
V
SS
Ground
N.C
No Connection
8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM
The KM23V8105D(G) is a fully static mask programmable ROM
fabricated using silicon gate CMOS process technology, and is
organized either as 1,048,576 x 8 bit(byte mode) or as 524,288
x 16 bit(word mode) depending on BHE voltage level.(See
mode selection table)
This device includes PAGE read mode function, page read
mode allows 4 words(or 8 bytes) of data to read fast in the
same page, CE and A
2
~ A
18
should not be changed.
This device operates with 3.0V or 3.3V power supply, and all
inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The KM23V8105D is packaged in a 42-DIP and the
KM23V8105DG in a 44-SOP.
GENERAL DESCRIPTION
FEATURES
Switchable organization
1,048,576 x 8(byte mode)
524,288 x 16(word mode)
Random access time/Page Access Time
3.3V Operation : 100/30ns(Max.)
3.0V Operation : 120/50ns(Max.)
4 Words / 8 bytes page access
Supply voltage : single +3.0V/ single +3.3V
Current consumption
Operating : 40mA(Max.)
Standby : 30
μ
A(Max.)
Fully static operation
All inputs and outputs TTL compatible
Three state outputs
Package
-. KM23V8105D : 42-DIP-600
-. KM23V8105DG : 44-SOP-600
A
18
X
A
0~
A
1
AND
DECODER
BUFFERS
A
2
Y
AND
DECODER
BUFFERS
MEMORY CELL
MATRIX
(524,288x16/
1,048,576x8)
SENSE AMP.
CONTROL
LOGIC
DATA OUT
BUFFERS
A
-1
CE
OE
BHE
.
.
.
.
.
.
.
.
Q
0
/Q
8
Q
7
/Q
15
. . .
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAM
N.C
A
18
A
17
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
CE
V
SS
OE
Q
0
Q
8
Q
1
Q
9
SOP
KM23V8105DG
1
2
44
43
3
4
42
41
5
6
40
39
38
7
8
37
9
10
36
35
11
12
34
33
13
14
32
31
15
16
30
29
17
18
28
27
19
20
26
25
21
22
24
23
Q
2
Q
10
Q
3
Q
11
Q
11
A
18
A
17
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
CE
V
SS
OE
Q
0
Q
8
Q
1
Q
9
DIP
KM23V8105D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Q
2
Q
10
Q
3
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
Q
4
Q
12
Q
5
Q
13
Q
6
V
SS
Q
14
Q
7
Q
15
/A
-1
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
BHE
V
CC
N.C
A
8
Q
4
Q
12
Q
5
Q
13
Q
6
V
SS
Q
14
Q
7
Q
15
/A
-1
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
BHE
V
CC
N.C
A
8
N.C
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| KM23V8105DG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM |
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