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參數(shù)資料
| 型號： | KKA8842 |
| 廠商： | KODENSHI CORP. |
| 英文描述： | I2C BUS CONTROLLED SINGLE CHIP TV-RECEIVER |
| 中文描述： | I2C總線控制的單芯片電視接收器 |
| 文件頁數(shù)： | 1/15頁 |
| 文件大?。?/td> | 221K |
| 代理商： | KKA8842 |
TECHNICAL DATA
I
2
C
BUS CONTROLLED SINGLE CHIP
TV-
RECEIVER
The
KK
A 8842 is I
2
C-bus controlled single chip TV processor which is intended to be applied in PAL,
NTSC, PAL/NTSC and multi-standard television receivers.
FEATURES
The following features are available:
Multi-standard vision IF circuit with an alignment-free PLL
demodulator without external components
Alignment-free multi-standard FM sound demodulator (4.5 MHz
to 6.5 MHz)
Audio switch
Automatic Volume Limiting
Flexible source selection with CVBS switch and Y(CVBS)/C input
so that a comb filter can be applied
Integrated chrominance trap circuit
Integrated luminance delay line
Asymmetrical peaking in the luminance channel with a
(defeatable) noise coring function
PAL/SECAM/NTSC decoder
Base-band delay line for PAL and SECAM or chroma comb filter
for NTSC
Black stretching of non-standard CVBS or luminance signals
Integrated chroma band-pass filter with switchable centre
frequency
Dynamic skin tone control circuit
Blue stretch circuit which offsets colours near white towards blue
RGB control circuit with "Continuous Cathode Calibration" and
white point adjustment
Possibility to insert a "blue back" option when no video signal is
available
Horizontal synchronization with two control loops and alignment-
free horizontal oscillator
Vertical count-down circuit
Vertical driver optimised for DC-coupled vertical output stages
I
2
C-bus control of various functions
1
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