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參數(shù)資料
| 型號(hào)： | KAD5512P-17Q72 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 26/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 170MSPS SGL 72-QFN |
| 產(chǎn)品培訓(xùn)模塊： | High-Speed Analog-to-Digital Converters |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | FemtoCharge™ |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 170M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 253mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 72-QFN（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個(gè)差分，單極 |
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KAD5512P
32
FN6807.4
October 1, 2010
at three times the via pad radius will provide good heat
transfer for high power devices. The vias below the
KAD5512P may be spaced further apart as shown on the
evaluation board since it is a low-power device. The via
diameter should be small but not too small to allow solder
wicking during reflow. PCB fabrication and assembly
companies can provide specific guidelines based on the
layer stack and assembly process.
Connect all vias under the KAD5512P to AVSS. It is
important to maximize the heat transfer by avoiding
the use of “thermal relief” patterns when connecting
the vias to the internal AVSS plane(s).
Definitions
Analog Input Bandwidth is the analog input frequency
at which the spectral output power at the fundamental
frequency (as determined by FFT analysis) is reduced by
3dB from its full-scale low-frequency value. This is also
referred to as Full Power Bandwidth.
Aperture Delay or Sampling Delay is the time
required after the rise of the clock input for the sampling
switch to open, at which time the signal is held for
conversion.
Aperture Jitter is the RMS variation in aperture delay
for a set of samples.
Clock Duty Cycle is the ratio of the time the clock wave
is at logic high to the total time of one clock period.
Differential Non-Linearity (DNL) is the deviation of
any code width from an ideal 1 LSB step.
Effective Number of Bits (ENOB) is an alternate method
of specifying Signal to Noise-and-Distortion Ratio (SINAD).
In dB, it is calculated as: ENOB = (SINAD - 1.76)/6.02
Gain Error is the ratio of the difference between the
voltages that cause the lowest and highest code
transitions to the full-scale voltage less 2 LSB. It is
typically expressed in percent.
Integral Non-Linearity (INL) is the maximum
deviation of the ADC’s transfer function from a best fit
line determined by a least squares curve fit of that
transfer function, measured in units of LSBs.
Least Significant Bit (LSB) is the bit that has the
smallest value or weight in a digital word. Its value in
terms of input voltage is VFS/(2N-1) where N is the
resolution in bits.
Missing Codes are output codes that are skipped and
will never appear at the ADC output. These codes cannot
be reached with any input value.
Most Significant Bit (MSB) is the bit that has the
largest value or weight.
Pipeline Delay is the number of clock cycles between
the initiation of a conversion and the appearance at the
output pins of the data.
Power Supply Rejection Ratio (PSRR) is the ratio of
the observed magnitude of a spur in the ADC FFT, caused
by an AC signal superimposed on the power supply
voltage.
Signal to Noise-and-Distortion (SINAD) is the ratio
of the RMS signal amplitude to the RMS sum of all other
spectral components below one half the clock frequency,
including harmonics but excluding DC.
Signal-to-Noise Ratio (without Harmonics) is the ratio
of the RMS signal amplitude to the RMS sum of all other
spectral components below one-half the sampling
frequency, excluding harmonics and DC.
SNR and SINAD are either given in units of dB when the
power of the fundamental is used as the reference, or
dBFS (dB to full scale) when the converter’s full-scale
input power is used as the reference.
Spurious-Free-Dynamic Range (SFDR) is the ratio of
the RMS signal amplitude to the RMS value of the largest
spurious spectral component. The largest spurious
spectral component may or may not be a harmonic.
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| KAD5512P-21Q48 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 210MSPS SINGL ADC PROG LVDS/LVCMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| KAD5512P-21Q72 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 210MSPS SINGL ADC PROG LVDS/LVCMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| KAD5512P-25Q48 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 250MSPS SINGL PROG LVDS/LVCMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| KAD5512P-25Q72 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 250MSPS SINGL PROG LVDS/LVCMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| KAD5512P-50 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:12-Bit, 500MSPS A/D Converter |
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