參數(shù)資料
型號(hào)： KA3511
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi)： 穩(wěn)壓器
英文描述： PC POWER SUPPLY DESIGN WITH KA3511
中文描述： 0.2 A SWITCHING CONTROLLER, 10 kHz SWITCHING FREQ-MAX, PDIP22
封裝： 0.400 INCH, DIP-22
文件頁(yè)數(shù)： 15/28頁(yè)
文件大?。?/td> 233K
代理商： KA3511
15
Rev C, November 1999
6.8 R/S FLIP FLOP (LATCH) BLOCK
Figure 10. R-S F/F Block Diagram
There is a R-S F/F (Latch) circuit for shutdown operation in the KA3511. R-S F/F (Latch) is con-
trolled by OVP, UVP, and some delayed remote ON/OFF signal.
If any output of OVP or UVP is High, SET signal of R-S F/F is high status and it produces PWM
“High” and main power is turned off. When remote signal is high, its delayed output signal is sup-
plied to RESET port of R-S F/F and it produces SET low. So output Q is low status. At this time,
PWM maintains high status by delayed remote high signal.
After main power is turned-off by OVP/UVP and initialized by remote, if remote signal is changed to
low, main power becomes operational.
When you test KA3511, Remote ON/OFF signal should be toggled once for initializing.
OVP+
Low
Low
High
High
SET
Low
Low
High
Low
RESET
Low
High
Low
High
Qn+1
Qn
High
High
Low
Qn+1
Qn
High
Low
High
ON/OFF
DELAY
S
R
Q
OVP
UVP
Start-up
NOR
NOR
R-S FF
Q
Delayed
REMOTE
REMOTE
ON/OFF
R-S F/F (LATCH)
PG BLOCK
PG
generator
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