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參數(shù)資料
| 型號： | K6T1008C2E-GB70 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 元件分類： | DRAM |
| 英文描述： | 128Kx8 bit Low Power CMOS Static RAM |
| 中文描述： | 128Kx8位低功耗CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 190K |
| 代理商： | K6T1008C2E-GB70 |
CMOS SRAM
K6T1008C2E Family
Revision 3.0
March 2000
6
Address
Data Out
Previous Data Valid
Data Valid
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1)
(Address Controlled
,
CS1=OE=V
IL
, CS2=WE=V
IH
)
t
AA
t
RC
t
OH
TIMING WAVEFORM OF READ CYCLE(2)
(WE=V
IH
)
Data Valid
High-Z
CS
1
Address
OE
Data ou
t
NOTES (
READ CYCLE)
1.
t
HZ
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
levels.
2. At any given temperature and voltage condition,
t
HZ
(Max.) is less than
t
LZ
(Min.) both for a given device and from device to device
interconnection.
CS
2
t
OH
t
AA
t
OLZ
t
LZ
t
OHZ
t
HZ(1,2)
t
RC
t
CO2
t
OE
t
CO1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K6T1008C2E-GF55 | 128Kx8 bit Low Power CMOS Static RAM |
| K6T1008C2E-GF70 | 128Kx8 bit Low Power CMOS Static RAM |
| K6T1008C2E-GL55 | 128Kx8 bit Low Power CMOS Static RAM |
| K6T1008C2E-GL70 | 128Kx8 bit Low Power CMOS Static RAM |
| K6T1008C2E-GP55 | 128Kx8 bit Low Power CMOS Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K6T1008C2E-GB70000 | 制造商:Samsung SDI 功能描述:SRAM Chip Async Single 5V 1M-Bit 128K x 8 70ns 32-Pin SOP |
| K6T1008C2E-GB70T00 | 制造商:Samsung SDI 功能描述:SRAM Chip Async Single 5V 1M-Bit 128K x 8 70ns 32-Pin SOP T/R |
| K6T1008C2E-GF55 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Kx8 bit Low Power CMOS Static RAM |
| K6T1008C2E-GF55000 | 制造商:Samsung SDI 功能描述: |
| K6T1008C2EGF70 | 制造商: 功能描述: 制造商:undefined 功能描述: |
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