參數(shù)資料
型號: K6R1008C1D-KI10
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
元件分類: DRAM
英文描述: 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
中文描述: 256Kx4位(與OE)的高速CMOS靜態(tài)RAM(5.0V操作)。
文件頁數(shù): 4/8頁
文件大?。?/td> 168K
代理商: K6R1008C1D-KI10
K6R1008C1A-C, K6R1008C1A-I
CMOS SRAM
PRELIMINARY
Rev 4.0
- 4 -
February 1998
TEST CONDITIONS*
* The above test conditions are also applied at industrial temperature range.
Parameter
Value
Input Pulse Levels
0V to 3V
Input Rise and Fall Times
3ns
Input and Output timing Reference Levels
1.5V
Output Loads
See below
AC CHARACTERISTICS
(T
A
=0 to 70
°
C, V
CC
=5.0V
±
10%, unless otherwise noted.)
READ CYCLE*
* The above parameters are also guaranteed at industrial temperature range
.
Parameter
Symbol
K6R1008C1A-12
K6R1008C1A-15
K6R1008C1A-20
Unit
Min
Max
Min
Max
Min
Max
Read Cycle Time
t
RC
12
-
15
-
20
-
ns
Address Access Time
t
AA
-
12
-
15
-
20
ns
Chip Select to Output
t
CO
-
12
-
15
-
20
ns
Output Enable to Valid Output
t
OE
-
6
-
7
-
9
ns
Chip Enable to Low-Z Output
t
LZ
3
-
3
-
3
-
ns
Output Enable to Low-Z Output
t
OLZ
0
-
0
-
0
-
ns
Chip Disable to High-Z Output
t
HZ
0
6
0
7
0
9
ns
Output Disable to High-Z Output
t
OHZ
0
6
0
7
0
9
ns
Output Hold from Address Change
t
OH
3
-
3
-
3
-
ns
Chip Selection to Power Up Time
t
PU
0
-
0
-
0
-
ns
Chip Selection to Power DownTime
t
PD
-
12
-
15
-
20
ns
Output Loads(A)
Output Loads(B)
for t
HZ
, t
LZ
, t
WHZ
, t
OW
, t
OLZ
& t
OHZ
D
OUT
5pF*
480
255
+5.0V
D
OUT
30pF*
480
255
+5.0V
* Including Scope and Jig Capacitance
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