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參數資料
| 型號： | K6F8016U6D-XF55 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512K x16 bit Super Low Power and Low Voltage Full CMOS Static RAM |
| 中文描述： | 為512k x16位超低功耗和低電壓的CMOS靜態(tài)RAM全 |
| 文件頁數： | 6/9頁 |
| 文件大?。?/td> | 154K |
| 代理商： | K6F8016U6D-XF55 |
K6F8016U6D Family
Revision 1.0
January 2005
6
CMOS SRAM
Address
Data Out
Previous Data Valid
Data Valid
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1)
(Address Controlled
,
CS
1
=OE=V
IL
, CS
2
=WE=V
IH
, UB or/and LB=V
IL
)
TIMING WAVEFORM OF READ CYCLE(2)
(WE=V
IH
)
Data Valid
High-Z
t
RC
CS
1
Address
UB, LB
OE
Data out
t
AA
t
RC
t
OH
t
OH
t
AA
t
CO
t
BA
t
OE
t
OLZ
t
BLZ
t
LZ
t
OHZ
t
BHZ
t
HZ
NOTES (
READ CYCLE)
1.
t
HZ
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
levels.
2. At any given temperature and voltage condition,
t
HZ
(Max.) is less than
t
LZ
(Min.) both for a given device and from device to device
interconnection.
CS
2
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