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參數(shù)資料
| 型號： | K4S64323LH-HL75 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Dual Rail-To-Rail Micropower Operational Amplifier 8-PDIP 0 to 70 |
| 中文描述： | 為512k × 32Bit的× 4銀行在90FBGA移動SDRAM |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 64K |
| 代理商： | K4S64323LH-HL75 |
K4S64323LF-S(D)N/U/P
Rev. 1.5 Dec 2002
CMOS SDRAM
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Parameter
Symbol
- 75
-1H
-1L
- 15
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
CLK cycle time
CAS latency=3
t
CC
7.5
1000
9.5
1000
9.5
1000
15
1000
ns
1
CAS latency=2
9.5
9.5
12
15
CAS latency=1
-
-
25
30
CLK to valid output delay
CAS latency=3
t
SAC
5.4
7
7
9
ns
1,2
CAS latency=2
7
7
8
9
CAS latency=1
-
-
20
24
Output data hold time
CAS latency=3
t
OH
2.5
2.5
2.5
2.5
ns
2
CAS latency=2
2.5
2.5
2.5
2.5
CAS latency=1
-
-
2.5
2.5
CLK high pulse width
t
CH
2.5
3
3
3.5
ns
3
CLK low pulse width
t
CL
2.5
3
3
3.5
ns
3
Input setup time
t
SS
2.0
2.5
2.5
3.5
ns
3
Input hold time
t
SH
1.0
1.5
1.5
2.0
ns
3
CLK to output in Low-Z
t
SLZ
1
1
1
1
ns
2
CLK to output in Hi-Z
CAS latency=3
t
SHZ
5.4
7
7
9
ns
CAS latency=2
7
7
8
9
CAS latency=1
-
-
20
24
Notes :
1. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life
is potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of
a product contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea
repeater use.
相關PDF資料 |
PDF描述 |
|---|---|
| K4S64323LH-HN1H | Dual Rail-To-Rail Micropower Operational Amplifier 8-TSSOP 0 to 70 |
| K4S64323LH-HN1L | Dual Rail-To-Rail Micropower Operational Amplifier 8-TSSOP 0 to 70 |
| K4S64323LH-HN60 | 512K x 32Bit x 4 Banks Mobile SDRAM in 90FBGA |
| K4S64323LF-SN1L-PB | 2Mx32 Mobile SDRAM 90FBGA |
| K4S64323LF-SN1H-PB | 2Mx32 Mobile SDRAM 90FBGA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K4S64323LH-HN1H | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 32Bit x 4 Banks Mobile SDRAM in 90FBGA |
| K4S64323LH-HN1L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 32Bit x 4 Banks Mobile SDRAM in 90FBGA |
| K4S64323LH-HN60 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 32Bit x 4 Banks Mobile SDRAM in 90FBGA |
| K4S64323LH-HN75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 32Bit x 4 Banks Mobile SDRAM in 90FBGA |
| K4S64323LK-HN75000 | 制造商:Samsung Semiconductor 功能描述:64M SDRAM X32 FBGA - Trays |
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