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參數(shù)資料
| 型號： | K4S511632B-TC75 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Mb B-die SDRAM Specification |
| 中文描述： | 512MB的乙芯片內(nèi)存規(guī)格 |
| 文件頁數(shù)： | 11/15頁 |
| 文件大?。?/td> | 149K |
| 代理商： | K4S511632B-TC75 |
CMOS SDRAM
SDRAM 512Mb B-die (x4, x8, x16)
Rev. 1.1 February 2004
AC OPERATING TEST CONDITIONS
(V
DD
= 3.3V
±
0.3V, T
A
= 0 to 70
°
C)
Parameter
AC input levels (Vih/Vil)
Value
2.4/0.4
Unit
V
Input timing measurement reference level
Input rise and fall time
1.4
V
ns
tr/tf = 1/1
Output timing measurement reference level
1.4
V
Output load condition
See Fig. 2
3.3V
1200
870
Output
50pF
V
OH
(DC) = 2.4V, I
OH
= -2mA
V
OL
(DC) = 0.4V, I
OL
= 2mA
Vtt = 1.4V
50
Output
50pF
Z0 = 50
(Fig. 2) AC output load circuit
(Fig. 1) DC output load circuit
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Parameter
Symbol
Version
75
15
20
Unit
Note
Row active to row active delay
RAS to CAS delay
t
RRD
(min)
t
RCD
(min)
ns
ns
1
1
Row precharge time
t
RP
(min)
t
RAS
(min)
20
45
ns
ns
1
1
Row active time
t
RAS
(max)
t
RC
(min)
100
65
us
ns
Row cycle time
1
Last data in to row precharge
Last data in to Active delay
t
RDL
(min)
t
DAL
(min)
2
CLK
ns
2
2 CLK + tRP
Last data in to new col. address delay
Last data in to burst stop
t
CDL
(min)
t
BDL
(min)
1
1
CLK
CLK
2
2
Col. address to col. address delay
t
CCD
(min)
1
2
CLK
3
Number of valid output data
CAS latency = 3
ea
4
CAS latency = 2
1
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time
and then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
Notes :
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4S511632B-TCL75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb B-die SDRAM Specification |
| K4S511632B-UC75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb B-die SDRAM Specification |
| K4S511632C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDP 512Mbit SDRAM |
| K4S511632C-KC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDP 512Mbit SDRAM |
| K4S511632C-KC/L1H | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDP 512Mbit SDRAM |
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