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參數(shù)資料
| 型號(hào)： | K4S510832B-UC75 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Mb B-die SDRAM Specification |
| 中文描述： | 512MB的乙芯片內(nèi)存規(guī)格 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 149K |
| 代理商： | K4S510832B-UC75 |
CMOS SDRAM
SDRAM 512Mb B-die (x4, x8, x16)
Rev. 1.1 February 2004
Part No.
Orgainization
128Mb x 4 (CL=3)
64Mb x 8 (CL=3)
32Mb x 16 (CL=3)
Max Freq.
133MHz
133MHz
133MHz
Interface
Package
K4S510432B-TC(L)75
K4S510832B-TC(L)75
K4S511632B-TC(L)75
LVTTL
54pin TSOP(II)
The K4S510432B / K4S510832B / K4S511632B is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x
33,554,432 words by 4 bits / 4 x 16,777,216 words by 8 bits / 4 x 8,388,608 words by 16 bits, fabricated with SAMSUNG's high perfor-
mance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible
on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to
be useful for a variety of high bandwidth, high performance memory system applications.
JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8)
-. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation
DQM (x4,x8) & L(U)DQM (x16) for masking
Auto & self refresh
64ms refresh period (8K Cycle)
GENERAL DESCRIPTION
FEATURES
32M x 4Bit x 4 Banks / 16M x 8Bit x 4 Banks / 8M x 16Bit x 4 Banks SDRAM
Ordering Information
Row & Column address configuration
Organization
128Mx4
Row Address
A0~A12
Column Address
A0-A9, A11, A12
64Mx8
32Mx16
A0~A12
A0~A12
A0-A9, A11
A0-A9
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4S511632B-UC75 | 512Mb B-die SDRAM Specification |
| K4S511632C | DDP 512Mbit SDRAM |
| K4S511632C-KC | DDP 512Mbit SDRAM |
| K4S511632C-L1H | DDP 512Mbit SDRAM |
| K4S511632C-L1L | DDP 512Mbit SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4S510832D | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:SDRAM Product Guide |
| K4S510832D-TC75000 | 制造商:Samsung Semiconductor 功能描述:512 SDRAM X8 TSOP2 - Trays |
| K4S510832D-UC75000 | 制造商:Samsung Semiconductor 功能描述:DRAM CHIP SDRAM 512MBIT 3.3V 54TSOP-II - Bulk |
| K4S510832D-UC75T00 | 制造商:Samsung Semiconductor 功能描述:512MSDRAMSDRAMX8TSOP2 - Tape and Reel |
| K4S510832M | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
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