
SDRAM 128Mb E-die (x4, x8, x16)
CMOS SDRAM
Rev. 1.4 February. 2004
DC CHARACTERISTICS (x4, x8)
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
Version
-75
Unit
Note
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
O
= 0 mA
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
I
O
= 0 mA
Page burst
t
RC
≥
t
RC
(min)
90
mA
1
Precharge standby current in
power-down mode
I
CC2
P
I
CC2
PS
2
2
mA
Precharge standby current in
non power-down mode
I
CC2
N
20
mA
I
CC2
NS
10
Active standby current in
power-down mode
I
CC3
P
I
CC3
PS
5
5
mA
Active standby current in
non power-down mode
(One bank active)
I
CC3
N
30
mA
I
CC3
NS
25
mA
Operating current
(Burst mode)
Refresh current
I
CC4
110
mA
1
I
CC5
200
2
800
mA
mA
uA
2
3
4
Self refresh current
I
CC6
CKE
≤
0.2V
C
L
1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S2804(08)32E-TC
4. K4S2804(08)32E-TL
5. Unless otherwise noted, input swing IeveI is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ)
Notes :