參數(shù)資料
型號: K4R271669D-T
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128Mbit RDRAM(D-die)
中文描述: 128Mbit的RDRAM(深模)
文件頁數(shù): 15/20頁
文件大小: 310K
代理商: K4R271669D-T
Page 13
Direct RDRAM
Preliminary
Version 1.0 Dec. 2001
K4R271669D
a. MSE/MS are fields of the SKIP register. For this combination (skip
override) the tDCW parameter range is effectively 0.0 to 0.0.
b. t
S,MIN
and t
H,MIN
for other t
CYCLE
values can be interpolated
between or extrapolated from the timings at the 3 specified t
CYCLE
values.
c. With V
IL,CMOS
=0.5V
CMOS
-0.4V and V
IH,CMOS
=0.5V
CMOS
+0.4V
d. Effective hold becomes t
H4
’=t
H4
+[PDNXA
64
t
SCYCLE
+t
PD-
NXB,MAX
]-[PDNX
256
t
SCYCLE
]
if [PDNX
256
t
SCYCLE
] < [PDNXA
64
t
SCYCLE
+t
PDNXB,MAX
]. See
Figure 49.
t
CCTRL
Current control interval
34 t
CYCLE
100ms
ms/t
CY-
CLE
Figure 53
t
TEMP
Temperature control interval
100
ms
Figure 54
t
TCEN
TCE command to TCAL command
150
-
t
CYCLE
Figure 54
t
TCAL
TCAL command to quiet window
2
2
t
CYCLE
Figure 54
t
TCQUIET
Quiet window (no read data)
140
-
t
CYCLE
Figure 54
t
PAUSE
RDRAM delay (no RSL operations allowed)
200.0
μ
s
page 38
Table 11: Timing Conditions
Symbol
Parameter
Min
Max
Unit
Figure(s)
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