參數(shù)資料
型號: K4C89083AF-GIFB
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 288Mb x18 Network-DRAM2 Specification
中文描述: 288Mb x18網(wǎng)絡DRAM2規(guī)范
文件頁數(shù): 46/55頁
文件大?。?/td> 1470K
代理商: K4C89083AF-GIFB
K4C89183AF
- 46 -
REV. 0.7 Jan. 2005
Extended Mode Register Set Timing (CL=4, BL=4)
From Write operation to Extended Mode Register Set operation
Command
A14~A0
WRA
DESL
LAL
LA
UA
BA
BA0, BA1
RDA
DESL
MRS
l
RC
=7cycles
LAL
LA
UA
BA1="0"
BA
or
WRA
BA0="0"
(oValid
When DQ strobe mode is changed by EMRS, QS output is invalid for I
RSC
period.
DLL switch in Extended Mode Register must be set to enable mode for normal operation.
DLL lock-on time is needed after initial EMRS operation. See Power Up Sequence.
Minimum delay from LAL following WRA to RDA of EMRS operation is WL+BL/2.
Note :
Unidirectional DS/Free Running QS mode
(Output)
QS
DC
DQ
(input)
DS
(input)
(Output)
QS
DQ
(input)
DS
Low
D0 D1 D2 D3
D0 D1 D2 D3
Unidirectional DS/QS mode
(input)
0
2
3
4
5
6
7
8
9
10
11
1
12
13
14
15
CLK
CLK
WL + BL/2
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