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參數(shù)資料
| 型號： | JAN2N6802 |
| 英文描述： | TRANSISTOR | MOSFET | N-CHANNEL | 500V V(BR)DSS | 3.5A I(D) | TO-39 |
| 中文描述： | 晶體管| MOSFET的| N溝道| 500V五（巴西）直| 3.5AI（四）| TO - 39封裝 |
| 文件頁數(shù)： | 15/19頁 |
| 文件大?。?/td> | 103K |
| 代理商： | JAN2N6802 |
MIL-PRF-19500/512E
5
Dimensions
Ltr
Inches
Millimeters
Notes
Ltr
Inches
Millimeter
Notes
Min
Max
Min
Max
Min
Max
Min
Max
A
.061
.075
1.55
1.90
3
D2
.0375 BSC
0.952 BSC
A1
.029
.041
0.74
1.04
D3
.155
3.93
B1
.022
.028
0.56
0.71
E
.215
.225
5.46
5.71
B2
.075 REF
1.91 REF
E3
.225
5.71
B3
.006
.022
0.15
0.56
5
L1
.032
.048
0.81
1.22
D
.145
.155
3.68
3.93
L2
.072
.088
1.83
2.23
D1
.045
.055
1.14
1.39
L3
.003
.007
0.08
0.18
5
NOTES:
1. Dimensions are in inches.
2. Metric equivalents are given for general information only.
3. Dimension "A" controls the overall package thickness. When a window lid is used, dimension "A" must
increase by a minimum of .010 inch (0.254 mm) and a maximum of .040 inch (1.020 mm).
4. The corner shape (square, notch, radius, etc.) may vary at the manufacturer's option, from that shown on
the drawing.
5. Dimensions "B3" minimum and "L3" minimum and the appropriately castellation length define an
unobstructed three-dimensional space traversing all of the ceramic layers in which a castellation was
designed. (Castellations are required on bottom two layers, optional on top ceramic layer.) Dimension
"B3" maximum and "L3" maximum define the maximum width and depth of the castellation at any point on
its surface. Measurement of these dimensions may be made prior to solder dipping.
FIGURE 3. Physical dimensions, surface mount (UA version).
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| JAN2N6802E3 | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:N-CHANNEL MOSFET Qualified per MIL-PRF-19500/557 |
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