參數(shù)資料
型號(hào)： IXTH10P60
廠商： IXYS CORP
元件分類： JFETs
英文描述： Standard Power MOSFET
中文描述： 10 A, 600 V, 1 ohm, P-CHANNEL, Si, POWER, MOSFET, TO-247
封裝： PLASTIC PACKAGE-3
文件頁數(shù)： 1/2頁
文件大?。?/td> 70K
代理商： IXTH10P60
2001 IXYS All rights reserved
TO-247 AD
G = Gate,
S = Source,
D = Drain,
TAB = Drain
D (TAB)
Symbol
Test Conditions
Maximum Ratings
V
DSS
V
DGR
V
GS
V
GSM
I
D25
I
DM
I
AR
E
AR
P
D
T
J
T
JM
T
stg
T
L
T
J
= 25
°
C to 150
°
C
T
J
= 25
°
C to 150
°
C; R
GS
= 1 M
-600
V
-600
V
Continuous
±
20
±
30
V
Transient
V
T
C
= 25
°
C
T
C
= 25
°
C, pulse width limited by T
J
T
C
= 25
°
C
T
C
= 25
°
C
T
C
= 25
°
C
-10
A
-40
A
-10
A
30
mJ
300
W
-55 ... +150
°
C
150
°
C
°
C
-55 ... +150
Maximum lead temperature for soldering
1.6 mm (0.062 in.) from case for 10 s
300
°
C
M
d
Weight
Mounting torque
1.13/10
Nm/lb.in.
6
g
Standard Power MOSFET
P-Channel Enhancement Mode
Avalanche Rated
Symbol
Test Conditions
Characteristic Values
(T
J
= 25
°
C, unless otherwise specified)
min.
typ.
max.
V
DSS
V
GS
= 0 V, I
D
= -250
μ
A
-600
V
V
GS(th)
V
DS
= V
GS
, I
D
= -250
μ
A
-3.0
-5.0
V
I
GSS
V
GS
=
±
20 V
DC
, V
DS
= 0
±
100
nA
I
DSS
V
DS
= 0.8 V
DSS
V
GS
= 0 V
T
J
= 25
°
C
T
J
= 125
°
C
-25
-1
μ
A
mA
R
DS(on)
V
GS
= -10 V, I
D
= 0.5 I
D25
1.0
Features
International standard package
JEDEC TO-247 AD
Low R
DS (on)
HDMOS
TM
process
Rugged polysilicon gate cell structure
Unclamped Inductive Switching (UIS)
rated
Low package inductance (<5 nH)
- easy to drive and to protect
Applications
High side switching
Push-pull amplifiers
DC choppers
Automatic test equipment
Advantages
Easy to mount with 1 screw
(isolated mounting screw hole)
Space savings
High power density
98849 (8/01)
IXTH 10P60
ADVANCE TECHNICAL INFORMATION
V
DSS
I
D25
R
DS(on)
= 1
= -600 V
= -10 A
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