02-IM1010-030827
sales@integrant.biz
Tel: 82-31-719-4500
16/19
C DMA C ellula r/C DMA 450 R ec eiver R F F ront-end IC
I TM1010
8. Layout Guidelines
The guidelines listed below help the users to achieve the optimum performance of ITM1010 when
drawing their layout. These guidelines are recommended.
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Keep RF signal lines as short as possible to minimize unnecessary losses and radiation.
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For the best noise performance of LNA, keep the pad-to-pad distance in LNA input line as short
as possible. The minimum distance is recommended. Also, use high Q components in LNA
input-matching circuit.
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The 0 ohm resistor between pin 10(LNA_E) and ground is used as a degeneration inductor of the
LNA for 800MHz application. This component should not be eliminated. It can also be replaced
with chip inductors to increase IP3 of LNA at the cost of smaller gain and higher noise figure.
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At the mixer outputs (pin 5 and pin 6), keep the differential signal lines of the same length to
ensure signal balance. Symmetrical PCB layout is recommended.
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High value (47nF) chip capacitors in the evaluation board (Fig. 4-1) are used for optimum IP3
performance of ITM1010. Do not replace these capacitors with smaller value capacitors.
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For various duplexer and RF SAW filters, sensitivity and IMD performance can be optimized by
tuning R5, L4 and R2 in Fig. 4-1.
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Parasitic impedances at pins 8 (MIX_E) and 10 (LNA_E) might affect RF performance
significantly because these pins are used as degeneration. Short PCB lines are recommended for
these two pins.
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Generally, high LO power is preferable for high gain/IIP3 and low noise figure of the mixer.