Specifications ispLSI 5256VE 18 Power Consumption setting operates product terms at their normal full power consumption. For portions of the lo" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� ISPLSI 5256VE-125LT128
寤犲晢锛� Lattice Semiconductor Corporation
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 10/24闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC PLD ISP 144I/O 7.5NS 128TQFP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 90
绯诲垪锛� ispLSI® 5000VE
鍙法绋嬮鍨嬶細 绯荤当(t菕ng)鍏�(n猫i)鍙法绋�
鏈€澶у欢閬叉檪(sh铆)闁� tpd(1)锛� 7.5ns
闆诲闆绘簮 - 鍏�(n猫i)閮細 3 V ~ 3.6 V
閭忚集鍏冧欢/閭忚集濉婃暩(sh霉)鐩細 8
瀹忓柈鍏冩暩(sh霉)锛� 256
闁€鏁�(sh霉)锛� 12000
杓稿叆/杓稿嚭鏁�(sh霉)锛� 96
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 128-LQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 128-TQFP锛�14x14锛�
鍖呰锛� 鎵樼洡(p谩n)
鍏跺畠鍚嶇ū锛� ISPLSI5256VE-125LT128
Specifications ispLSI 5256VE
18
Power Consumption
setting operates product terms at their normal full power
consumption. For portions of the logic that can tolerate
longer propagation delays, selecting the slower 鈥渓(f膩)ow-
power鈥� setting will reduce the power dissipation for these
product terms. Figure 10 shows the relationship between
power and operating frequency.
Power consumption in the ispLSI 5256VE device de-
pends on two primary factors: the speed at which the
device is operating and the number of product terms
used. The product terms have a fuse-selectable speed/
power tradeoff setting. Each group of five product terms
has a single speed/power tradeoff control fuse that acts
on the complete group of five. The fast 鈥渉igh-speed鈥�
175
025
5075
100
125
150
175
200
fmax (MHz)
I CC
(mA)
Notes: Configuration of 16 16-bit Counters
Typical Current at 3.3V, 25掳 C
ispLSI 5256VE
High Speed Mode
ispLSI 5256VE
Low Power Mode
0127/5256VE
ICC can be estimated for the ispLSI 5256VE using the following equation:
High Speed Mode: ICC = 21 + (# of PTs * 0.313) + (# of nets * Fmax * 0.00282)
Low Power Mode: ICC = 21 + (# of PTs * 0.258) + (# of nets * Fmax * 0.00282)
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Fmax = Highest Clock Frequency to the device
The ICC estimate is based on typical conditions (VCC = 3.3V, room temperature) and an assumption of one GLB load
on average exists. These values are for estimates only. Since the value of ICC is sensitive to operating conditions
and the program in the device, the actual ICC should be verified.
225
275
300
250
200
150
Figure 10. Typical Device Power Consumption vs fmax
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
ISPLSI 5256VE-125LT100 IC PLD ISP 144I/O 7.5NS 100TQFP
GBA24DTKH CONN EDGECARD 48POS DIP .125 SLD
RSC40DRYI CONN EDGECARD 80POS DIP .100 SLD
V48A5E400BG2 CONVERTER MOD DC/DC 5V 400W
R12P205S/X2/P/R6.4 CONV DC/DC 2W 12VIN 05VOUT
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鍙冩暩(sh霉)鎻忚堪
ISPLSI5256VE-125LT128 鍔熻兘鎻忚堪:CPLD - 寰�(f霉)闆滃彲绶ㄧ▼閭忚集鍣ㄤ欢 RoHS:鍚� 鍒堕€犲晢:Lattice 绯诲垪: 瀛樺劜(ch菙)椤炲瀷:EEPROM 澶ч浕姹�?c谩i)?sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:333 MHz 寤堕伈鏅�(sh铆)闁�:2.7 ns 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:64 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 90 C 鏈€灏忓伐浣滄韩搴�:0 C 灏佽 / 绠遍珨:TQFP-100
ISPLSI5256VE-125LT128I 鍔熻兘鎻忚堪:CPLD - 寰�(f霉)闆滃彲绶ㄧ▼閭忚集鍣ㄤ欢 RoHS:鍚� 鍒堕€犲晢:Lattice 绯诲垪: 瀛樺劜(ch菙)椤炲瀷:EEPROM 澶ч浕姹�?c谩i)?sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:333 MHz 寤堕伈鏅�(sh铆)闁�:2.7 ns 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:64 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 90 C 鏈€灏忓伐浣滄韩搴�:0 C 灏佽 / 绠遍珨:TQFP-100
ISPLSI5256VE-165LB272 鍔熻兘鎻忚堪:CPLD - 寰�(f霉)闆滃彲绶ㄧ▼閭忚集鍣ㄤ欢 RoHS:鍚� 鍒堕€犲晢:Lattice 绯诲垪: 瀛樺劜(ch菙)椤炲瀷:EEPROM 澶ч浕姹�?c谩i)?sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:333 MHz 寤堕伈鏅�(sh铆)闁�:2.7 ns 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:64 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 90 C 鏈€灏忓伐浣滄韩搴�:0 C 灏佽 / 绠遍珨:TQFP-100
ISPLSI5256VE-165LF256 鍔熻兘鎻忚堪:CPLD - 寰�(f霉)闆滃彲绶ㄧ▼閭忚集鍣ㄤ欢 RoHS:鍚� 鍒堕€犲晢:Lattice 绯诲垪: 瀛樺劜(ch菙)椤炲瀷:EEPROM 澶ч浕姹�?c谩i)?sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:333 MHz 寤堕伈鏅�(sh铆)闁�:2.7 ns 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:64 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 90 C 鏈€灏忓伐浣滄韩搴�:0 C 灏佽 / 绠遍珨:TQFP-100
ISPLSI5256VE-165LT100 鍔熻兘鎻忚堪:CPLD - 寰�(f霉)闆滃彲绶ㄧ▼閭忚集鍣ㄤ欢 RoHS:鍚� 鍒堕€犲晢:Lattice 绯诲垪: 瀛樺劜(ch菙)椤炲瀷:EEPROM 澶ч浕姹�?c谩i)?sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:333 MHz 寤堕伈鏅�(sh铆)闁�:2.7 ns 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:64 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 90 C 鏈€灏忓伐浣滄韩搴�:0 C 灏佽 / 绠遍珨:TQFP-100