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8
ISO102/106
A sense amplifier detects only the differential information.
The output stage decodes the frequency modulated signal by
the means of a PLL. The feedback of the PLL employs a
second VCO that is identical to the encoder VCO. The PLL
forces the second VCO to operate at the same frequency
(and phase) as the encoder VCO; therefore, the two VCOs
have the same input voltage. The input voltage of the
decoder VCO serves as the isolation buffer’s output signal
after passing through a 100kHz second-order active filter.
For a more detailed description of the internal operation of
the ISO102 and ISO106, refer to
Proceedings of the 1987
International Symposium on Microelectronics,
pages 202-
206.
ABOUT THE BARRIER
For any isolation product, barrier composition is of para-
mount importance in achieving high reliability. Both the
ISO102 and ISO106 utilize two 3pF high voltage ceramic
coupling capacitors. They are constructed of tungsten thick
film deposited in a spiral pattern on a ceramic substrate.
Capacitor plates are buried in the package, making the
barrier very rugged and hermetically sealed. Capacitance
results from the fringing electric fields of adjacent metal
runs. Dielectric strength exceeds 10kV and resistance is
typically 10
14
. Input and output circuitry are contained in
separate solder-sealed cavities, resulting in the industry’s
first fully hermetic hybrid isolation amplifier.
FIGURE 3. Technique for Wiring Analog and Digital Com-
mons Together.
FIGURE 2. Power Supply and Signal Connection.
Input Power Supplies
Input
Ground
Plane
–V
V
Gain Adjust
Common
IN
CC1
1
C
Common
Reference
+V
1
2
CC2
2
Digital Common
C
V
–V
2
+V
Offset Adjust
Offset
Reference
1
NC
0.1μF
NC
IN
V
0.1μF
Output Power Supplies
0.1μF
NC
Output
Ground
Plane
0.1μF
OUT
V
ISO102/106
NC
NC
NC—no connection necessary.
The ISO102 and ISO106 are designed to be free from partial
discharge at rated voltages. Partial discharge is a form of
localized breakdown that degrades the barrier over time.
Since it does not bridge the space across the barrier, it is
difficult to detect. Both isolation amplifiers have been exten-
sively evaluated at high temperature and high voltage.
POWER SUPPLY AND SIGNAL CONNECTIONS
Figure 2 shows the proper power supply and signal connec-
tions. Each supply should be AC-bypassed to Analog Com-
mon with 0.1
μ
F ceramic capacitors as close to the amplifier
as possible. Short leads will minimize lead inductance. A
ground plane will also reduce noise problems. Signal com-
mon lines should tie directly to the common pin even if a
low impedance ground plane is used. Refer to Digital Com-
mon in the Pin Descriptions table.
To avoid gain and isolation-mode rejection (IMR) errors
introduced by the external circuit, connect grounds as indi-
cated, being sure to minimize ground resistance. Any ca-
pacitance across the barrier will increase AC leakage current
and may degrade high frequency IMR. The schematic in
Figure 3 shows the proper technique for wiring analog and
digital commons together.
DISCUSSION OF
SPECIFICATIONS
The IS0102 and IS0106 are unity gain buffer isolation
amplifiers primarily intended for high level input voltages
on the order of 1V to 10V. They may be preceded by
operational, differential, or instrumentation amplifiers that
precondition a low level signal on the order of millivolts and
translate it to a high level.
Input
Common
Load
Circuit
Power
Supply
C
INTERNAL
V
OUT
R
–V
CC
+V
CC
Common
2
Analog Output
Ground
Digital Common
Digital Output
Ground*
V
ISO
C
EXT2
C
EXT1
C
C
EXT1
has minimal effect on total IMR.
and R have a direct effect.
EXT2
Common
1
*Part of ground plane to
reduce voltage drops.