參數(shù)資料
型號(hào): ISL97651ARTZ-TK
廠商: INTERSIL CORP
元件分類: 顯示驅(qū)動(dòng)器
英文描述: 4-Channel Integrated LCD Supply
中文描述: LIQUID CRYSTAL DISPLAY DRIVER, QCC36
封裝: 6 X 6 MM, ROHS COMPLIANT, PLASTIC, MO-220WJJD-1, TQFN-36
文件頁數(shù): 15/19頁
文件大小: 307K
代理商: ISL97651ARTZ-TK
15
FN7493.2
March 15, 2007
Negative Charge Pump Design Consideration
The negative charge pump consists of an internal switcher
M1, M2 which drives external steering diodes D2 and D3 via
a pump capacitor (C12) to generate the negative V
OFF
supply. An internal comparator (A1) senses the feedback
voltage on FBN and turns on M1 for a period up to half a
CLK period to maintain V
(FBN)
in regulated operation at
0.2V. External feedback resistor R6 is referenced to V
REF
.
Faults on V
OFF
which cause V
FBN
to rise to more than 0.4V,
are detected by comparator (A2) and cause the fault
detection system to start a fault ramp on C
DLY
pin which will
cause the chip to power down if present for more than the
time TFD (see "Electrical Specification" on page 2 and also
Figure 15).
The maximum V
OFF
output voltage of a single stage charge
pump is:
R6 and R7 in the “Typical Application Diagram” on page 10
determine V
OFF
output voltage.
Improving Charge Pump Noise Immunity
Depending on PCB layout and environment, noise pick-up at
the FBP and FBN inputs, which may degrade load regulation
performance, can be reduced by the inclusion of capacitors
across the feedback resistors (e.g. in the “Typical Application
Diagram” on page 10, C21 and C22 for the positive charge
pump). Set R6 C20 = R7 C19 with C19 ~ 100pF.
FIGURE 13. V
ON
FUNCTION DIAGRAM
VSUP
VSUP
VSUP
C1-
POUT
FBP
Control
C1+
C2-
C2+
D3
D2
D1
M2
M4
M1
M3
M5
VREF
1.2MHz
x2 Mode
x3 Mode
Both
External Connections
and Components
0.9V
C7
C8
C14
C21
R8
R9
C22
Error
FB
V
OFF_MAX
2x
(
)
V
SUP
V
DIODE
2 I
OUT
r
ON
NOUT
(
)
H r
ON
NOUT
(EQ. 19)
(
)
L
+
(
+
+
=
V
OFF
V
FBN
1
-------
+
V
REF
-------
=
(EQ. 20)
ISL97651
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