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參數(shù)資料
| 型號： | ISL9007IUKZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | High Current LDO with Low IQ and High PSRR |
| 中文描述： | 2.85 V FIXED POSITIVE LDO REGULATOR, 0.325 V DROPOUT, PDSO8 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-187AA, MSOP-8 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 257K |
| 代理商： | ISL9007IUKZ |
6
FN9218.0
October 13, 2005
Pin Description
Typical Application
Block Diagram
Functional Description
The ISL9007 contains all circuitry required to implement a
high performance LDO. High performance is achieved
through a circuit that delivers fast transient response to
varying load conditions. In a quiescent condition, the
ISL9007 adjusts its biasing to achieve the lowest standby
current consumption.
The device also integrates current limit protection, smart
thermal shutdown protection, and soft-start. Smart thermal
shutdown protects the device against overheating. Soft-start
minimize start-up input current surges without causing
execssive device turn-on time.
Power Control
The ISL9007 has a shutdown pin, SD, to control power to the
LDO output. When SD is high, the device is in shutdown
mode. In this condition, all on-chip circuits are off, and the
device draws minimum current, typically less than 0.1
μ
A.
When the SD pin goes low, the device first polls the output of
the UVLO detector to ensure that VIN voltage is at least 2.1V
(typical). Once verified, the device initiates a start-up
sequence. During the start-up sequence, trim settings are
first read and latched. Then, sequentially, the bandgap,
reference voltage and current generation circuitry turn on.
Once the references are stable, the LDO powers up.
During operation, whenever the VIN voltage drops below
about 1.84V, the ISL9007 immediately disables both LDO
outputs. When VIN rises back above 2.1V (assuming the
SD pin is low), the device re-initiates its start-up sequence
and LDO operation will resume automatically.
Reference Generation
The reference generation circuitry includes a trimmed
bandgap, a trimmed voltage reference divider, a trimmed
current reference generator, and an RC noise filter.
The bandgap generates a zero temperature coefficient (TC)
voltage for the regulator reference and other voltage
references required for current generation and over-
temperature detection.
A current generator provides references required for
adaptive biasing as well as references for LDO output
current limit and thermal shutdown determination.
LDO Regulation and Programmable Output Divider
The LDO Regulator is implemented with a high-gain
operational amplifier driving a PMOS pass transistor. The
design of the ISL9000 provides a regulator that has low
quiescent current, fast transient response, and overall
stability across all operating and load current conditions.
LDO stability is guaranteed for a 1
μ
F to 10
μ
F output
capacitor that has a tolerance better than 20% and ESR less
than 200m
. The design is performance-optimized for a 1
μ
F
capacitor. Unless limited by the application, use of an output
PIN #
PIN NAME
DESCRIPTION
1
VO
LDO Output:
Connect capacitor of value 1
μ
F to 10
μ
F to
GND (1
μ
F recommended)
2, 3, 4
NC
No Connection
5
GND
GND is the connection to system ground.
Connect to PCB Ground plane.
6
SD
LDO Shutdown. When this signal goes
high, the LDO is turned off.
7
VIN
Connect a 1
μ
F capacitor to GND.
8
VIN
Supply Voltage/LDO Input:
Connect a 1
μ
F capacitor to GND.
C1, C2: 1μF X5R ceramic capacitor
ISL9007
VIN
VIN
VO
GND
1
5
8
7
VIN (3.0-6.5V)
VOUT
C1
C2
SD
6
SHUTDOWN
ON
OFF
VO
GND
BANDGAP AND
TEMPERATURE
SENSOR
UVLO
VIN
VIN
SHORT CIRCUIT,
THERMAL PROTECTION,
SOFT-START
SD
CONTROL
LOGIC
ISL9007
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL9007IUNZ | High Current LDO with Low IQ and High PSRR |
| ISL9008AIRUNZ-T | Low Noise LDO with Low IQ, High PSRR |
| ISL9008A | Low Noise LDO with Low IQ, High PSRR |
| ISL9008AIEBZ-T | Low Noise LDO with Low IQ, High PSRR |
| ISL9008AIECZ-T | Low Noise LDO with Low IQ, High PSRR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL9007IUKZ-T | 功能描述:IC REG LDO 2.85V .4A 8MSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):正，可調(diào)式 輸出電壓:1.2 V ~ 5 V 輸入電壓:2.5 V ~ 7 V 電壓 - 壓降（標(biāo)準(zhǔn)）:0.24V @ 800mA 穩(wěn)壓器數(shù)量:1 電流 - 輸出:800mA 電流 - 限制（最?。?1.2A 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-261-5，TO-261AB 供應(yīng)商設(shè)備封裝:SOT-223-5 包裝:帶卷 (TR) 其它名稱:*LP3964EMPX-ADJLP3964EMPX-ADJLP3964EMPX-ADJ-NDLP3964EMPX-ADJ/NOPBTR |
| ISL9007IUNZ | 功能描述:IC REG LDO 3.3V .4A 8-MSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):正，可調(diào)式 輸出電壓:1.2 V ~ 5 V 輸入電壓:2.5 V ~ 7 V 電壓 - 壓降（標(biāo)準(zhǔn)）:0.24V @ 800mA 穩(wěn)壓器數(shù)量:1 電流 - 輸出:800mA 電流 - 限制（最小）:1.2A 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-261-5，TO-261AB 供應(yīng)商設(shè)備封裝:SOT-223-5 包裝:帶卷 (TR) 其它名稱:*LP3964EMPX-ADJLP3964EMPX-ADJLP3964EMPX-ADJ-NDLP3964EMPX-ADJ/NOPBTR |
| ISL9007IUNZ-T | 功能描述:IC REG LDO 3.3V .4A 8-MSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):正，可調(diào)式 輸出電壓:1.2 V ~ 5 V 輸入電壓:2.5 V ~ 7 V 電壓 - 壓降（標(biāo)準(zhǔn)）:0.24V @ 800mA 穩(wěn)壓器數(shù)量:1 電流 - 輸出:800mA 電流 - 限制（最?。?1.2A 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-261-5，TO-261AB 供應(yīng)商設(shè)備封裝:SOT-223-5 包裝:帶卷 (TR) 其它名稱:*LP3964EMPX-ADJLP3964EMPX-ADJLP3964EMPX-ADJ-NDLP3964EMPX-ADJ/NOPBTR |
| ISL9008A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Noise LDO with Low IQ, High PSRR |
| ISL9008AIEBZ-T | 功能描述:IC REG LDO 1.5V .15A SC70-5 RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):正，可調(diào)式 輸出電壓:1.25 V ~ 10 V 輸入電壓:2.9 V ~ 12 V 電壓 - 壓降（標(biāo)準(zhǔn)）:- 穩(wěn)壓器數(shù)量:1 電流 - 輸出:700mA 電流 - 限制（最小）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-VFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN（3x3） 包裝:Digi-Reel® 其它名稱:NCV8535MNADJR2GOSDKR |
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