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參數(shù)資料
| 型號： | ISL870XAEVAL1 |
| 廠商： | Intersil Corporation |
| 英文描述： | Adjustable Quad Sequencer |
| 中文描述： | 可調(diào)四序 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 285K |
| 代理商： | ISL870XAEVAL1 |
7
FN6381.0
October 12, 2006
Applications Usage
Using the ISL870XAEVAL1 Platform
The ISL870XAEVAL1 platform is the primary evaluation
board for this family of sequencers. See Figure 16 for
photograph and schematic.The evaluation board is shipped
with an
ISL8702A
mounted in the left position and with the
other device variants loose packed. In the following
discussion, test points names are
bold
on initial occurrence
for identification.
The
V
IN
test point is the chip bias and can be biased from
3.3V to 24V. The
VHI
test point is for the ENABLE and
FAULT
pull-up voltage which are limited to a maximum of
24V independent of V
IN
. The UV/OV resistor divider is set so
that a nominal 12V on the
VMONITOR
test point is compliant
and with a rising OV set at 13.2V and a falling UV set at
10.7V. These three test points (V
IN
,VHI and VMONITOR)
are brought out separately for maximum flexibility in
evaluation.
VMONITOR ramping up and down through the UV and OV
levels will result in the FAULT
output signaling the out of
bound conditions by being released to pull high to the VHI
voltage as shown in Figures 6 and 7.
Once the voltage monitoring FAULT is resolved and where
applicable, the
SEQ_EN
(#) is satisfied, sequencing of the
ENABLE_X(#) outputs begins. When sequence enabled the
ENABLE_A
,
ENABLE_B
,
ENABLE_C
and lastly
ENABLE_D
are asserted in that order and when SEQ_EN is
disabled the order is reversed. See Figures 8 and 9
demonstrating the sequenced enabling and disabling of the
ENABLE outputs. The timing between ENABLE outputs is
set by the resistor values on the TB, TC, TD pins as shown.
Figure 10 illustrates the timing from either SEQ_EN and/or
VMONITOR being valid to ENABLE_A being asserted with a
10nF TIME capacitor. Figure 11 shows that ENABLE_X
outputs are pulled low even before V
IN
= 1V. This is critical
to ensure that a false enable is not signaled. Figure 12
illustrates the SEQ_EN# input disabling and enabling the
ISL8705A ENABLE# outputs. Notice the reversal in order
and delay timing from ENABLE_X# to ENABLE_X#.
Figure 13 shows the time from SEQ_EN transition with the
voltage ramping across the TIME capacitor to TIME Vth
being met. This results in the immediate pull down of the
TIME pin and simultaneous ENABLE_A enabling.
FIGURE 3. ISL8702A, ISL8703A, ISL8704A, ISL8705A FAULT OPERATIONAL DIAGRAM
UNDERVOLTAGE
LIMIT
OVERVOLTAGE
LIMIT
MONITORED VOLTAGE
RAMPING UP AND DOWN
FAULT OUTPUT
t
FLTH
t
FLTH
t
FLTL
t
FLTL
<t
FLTH
Typical Performance Curves
FIGURE 4. UV/OV RISING THRESHOLD
FIGURE 5. V
IN
CURRENT
1.198
1.199
1.200
1.201
1.202
1.203
1.204
1.205
1.206
1.207
1.208
-40
-10
0
25
60
85
100
TEMP (°C)
U
V
IN
= 2.5V
V
IN
= 12V
V
IN
= 24V
150
170
190
210
230
250
270
290
310
-40
-10
0
25
60
85
100
TEMP (°C)
I
V
V
IN
= 12V
V
IN
= 24V
V
IN
= 2.5V
ISL8700A, ISL8701A, ISL8702A, ISL8703A, ISL8704A, ISL8705A
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| ISL870XEVAL1 | 功能描述:EVAL BOARD 1 FOR ISL870X RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| ISL8723EVAL1 | 功能描述:EVAL BOARD 1 FOR ISL8723 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| ISL8723IRZ | 功能描述:IC POWER SUPPLY SEQUENCER 24QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 應(yīng)用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ISL8723IRZR5369 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL8723IRZ-T | 功能描述:IC POWER SUPPLY SEQUENCER 24QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 應(yīng)用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
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