FN6040.1 July 8, 2005 High Data Rates The ISL83387E maintains the RS-232 ±
參數(shù)資料
型號: ISL83387EIVZ
廠商: Intersil
文件頁數(shù): 2/13頁
文件大?。?/td> 0K
描述: IC TXRX RS232 ESD 24TSSOP
標(biāo)準(zhǔn)包裝: 62
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: RS232
電源電壓: 3 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 1242 (CN2011-ZH PDF)
10
FN6040.1
July 8, 2005
High Data Rates
The ISL83387E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 9
details a transmitter loopback test circuit, and Figure 10
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 11 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
Interconnection with 3V and 5V Logic
Standard 3.3V powered RS-232 devices interface well with
3V and 5V powered TTL compatible logic families (e.g., ACT
and HCT), but the logic outputs (e.g., ROUTS) fail to reach
the VIH level of 5V powered CMOS families like HC, AC, and
CD4000. The ISL83387E VL supply pin solves this problem.
By connecting VL to the same supply (1.8V to 5V) powering
the logic device, the ISL83387E logic outputs will swing from
GND to the logic VCC.
±15kV ESD Protection
All pins on the 3V interface devices include ESD protection
structures, but the ISL83387E incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to
±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
TIME (20
s/DIV.)
T1
2V/DIV
5V/DIV
VCC = +3.3V
C1 - C4 = 0.1
F
T2
FORCEOFF
ISL83387E
VCC
C1
C2
C4
C3
+
1000pF
V+
V-
5K
TIN
ROUT
C1+
C1-
C2+
C2-
RIN
TOUT
+
VCC
0.1
F
VCC
FORCEOFF
FORCEON
VL
FIGURE 10. LOOPBACK TEST AT 120kbps
FIGURE 11. LOOPBACK TEST AT 250kbps
T1IN
T1OUT
R1OUT
5
s/DIV.
VCC = +3.3V
5V/DIV.
C1 - C4 = 0.1
F
T1IN
T1OUT
R1OUT
2
s/DIV.
5V/DIV.
VCC = +3.3V
C1 - C4 = 0.1
F
ISL83387E
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