FN6051.7 February 27, 2006 Receiver Enable from Shutdown to Output High tZH(SHDN) 
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      參數(shù)資料
      

      


      


      
型號(hào)：
ISL81487EIBZ-T

      

      
廠商：
Intersil

      

      
文件頁(yè)數(shù)：
11/14頁(yè)

      

      
文件大?。?/td>
0K

      

      
描述：
TXRX ESD RS-485/422 LP 8-SOIC

      

      
標(biāo)準(zhǔn)包裝：
1

      

      
類型：
收發(fā)器
      		

      

      
驅(qū)動(dòng)器/接收器數(shù)：
1/1
      		

      

      
規(guī)程：
RS422，RS485
      		

      

      
電源電壓：
4.5 V ~ 5.5 V
      		

      

      
安裝類型：
表面貼裝
      		

      

      
封裝/外殼：
8-SOIC（0.154"，3.90mm 寬）
      		

      

      
供應(yīng)商設(shè)備封裝：
8-SOICN
      		

      

      
包裝：
標(biāo)準(zhǔn)包裝

      

      
產(chǎn)品目錄頁(yè)面：
1242 (CN2011-ZH PDF)
      		

      

      
其它名稱：
ISL81487EIBZ-TDKR
      		

      

      

      

	
      
    
    

    
      
	
      6
      FN6051.7
      February 27, 2006
      Receiver Enable from Shutdown to
      Output High
      tZH(SHDN) CL = 15pF, SW = GND, (Figure 5, Notes 7, 9)
      Full
      -
      800
      2500
      ns
      Receiver Enable from Shutdown to
      Output Low
      tZL(SHDN) CL = 15pF, SW = VCC, (Figure 5, Notes 7, 9)
      Full
      -
      800
      2500
      ns
      SWITCHING CHARACTERISTICS (ISL81487L)
      Driver Input to Output Delay
      tPLH, tPHL RDIFF = 54, CL = 100pF, (Figure 2)
      Full
      150
      650
      1200
      ns
      Driver Output Skew
      tSKEW
      RDIFF = 54, CL = 100pF, (Figure 2)
      Full
      -
      160
      600
      ns
      Driver Differential Rise or Fall Time
      tR, tF
      RDIFF = 54, CL = 100pF, (Figure 2)
      Full
      250
      900
      1200
      ns
      Driver Enable to Output High
      tZH
      CL = 100pF, SW = GND, (Figure 3, Note 5)
      Full
      100
      1000
      1500
      ns
      Driver Enable to Output Low
      tZL
      CL = 100pF, SW = VCC, (Figure 3, Note 5)
      Full
      100
      1000
      1500
      ns
      Driver Disable from Output High
      tHZ
      CL = 15pF, SW = GND, (Figure 3)
      Full
      150
      750
      1500
      ns
      Driver Disable from Output Low
      tLZ
      CL = 15pF, SW = VCC, (Figure 3)
      Full
      150
      750
      1500
      ns
      Receiver Input to Output Delay
      tPLH, tPHL (Figure 4)
      Full
      30
      175
      250
      ns
      Receiver Skew | tPLH - tPHL |tSKD
      (Figure 4)
      25
      -
      13
      -
      ns
      Receiver Enable to Output High
      tZH
      CL = 15pF, SW = GND, (Figure 5, Note 6)
      Full
      -
      10
      50
      ns
      Receiver Enable to Output Low
      tZL
      CL = 15pF, SW = VCC, (Figure 5, Note 6)
      Full
      -
      10
      50
      ns
      Receiver Disable from Output High
      tHZ
      CL = 15pF, SW = GND, (Figure 5)
      Full
      -
      10
      50
      ns
      Receiver Disable from Output Low
      tLZ
      CL = 15pF, SW = VCC, (Figure 5)
      Full
      -
      10
      50
      ns
      Maximum Data Rate
      fMAX
      Full
      250
      -
      kbps
      Time to Shutdown
      tSHDN
      (Note 7)
      Full
      50
      140
      600
      ns
      Driver Enable from Shutdown to
      Output High
      tZH(SHDN) CL = 100pF, SW = GND, (Figure 3, Notes 7, 8)
      Full
      -
      1100
      2000
      ns
      Driver Enable from Shutdown to
      Output Low
      tZL(SHDN) CL = 100pF, SW = VCC, (Figure 3, Notes 7, 8)
      Full
      -
      1000
      2000
      ns
      Receiver Enable from Shutdown to
      Output High
      tZH(SHDN) CL = 15pF, SW = GND, (Figure 5, Notes 7, 9)
      Full
      -
      900
      2000
      ns
      Receiver Enable from Shutdown to
      Output Low
      tZL(SHDN) CL = 15pF, SW = VCC, (Figure 5, Notes 7, 9)
      Full
      -
      900
      2000
      ns
      ESD PERFORMANCE
      RS-485 Pins (A/Y, B/Z)
      Human Body Model
      25
      -
      ±15
      -
      kV
      All Other Pins
      25
      -
      >
      ±7-
      kV
      NOTES:
      2. Currents into device pins are positive; currents out of device pins are negative. Voltages are referenced to ground unless otherwise specified.
      3. Supply current specification is valid for loaded drivers when DE = 0V.
      4. Applies to peak current. See “Typical Performance Curves” for more information.
      5. When testing the ISL8487E and ISL81487L, keep RE = 0 to prevent the device from entering SHDN.
      6. When testing the ISL8487E and ISL81487L, the RE signal high time must be short enough (typically <200ns) to prevent the device from entering
      SHDN.
      7. The ISL8487E and ISL81487L are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts
      are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See
      “Low-Power Shutdown Mode” section.
      8. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
      9. Set the RE signal high time >600ns to ensure that the device enters SHDN.
      10. Devices meeting these limits are denoted as “1/8 unit load (1/8 UL)” transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus,
      so there can be 256 1/8 UL devices on a bus.
      Electrical Specifications
      Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified.
      Typicals are at VCC = 5V, TA = 25°C, (Note 2) (Continued)
      PARAMETER
      SYMBOL
      TEST CONDITIONS
      TEMP
      (°C)
      MIN
      TYP
      MAX
      UNITS
      ISL8487E, ISL81487L, ISL81487E
      
    
      
    
    
      


      


      

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      PDF描述
      		

      
      

      
VI-J7Z-MY-F4
CONVERTER MOD DC/DC 2V 20W

      

      
MCP6562-E/SN
IC COMP DUAL 1.8V PP 8-SOIC

      

      
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CONVERTER MOD DC/DC 2V 30W

      

      
VI-J7Z-MY-F3
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ISL8487EIBZ-T
IC TXRX RS485/422 5V ESD 8-SOIC

      

      

      

      


      


      

      相關(guān)代理商/技術(shù)參數(shù)
      		

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