參數資料
型號: ISL81485IB-T
廠商: Intersil
文件頁數: 8/11頁
文件大?。?/td> 0K
描述: IC TXRX RS485/422 5V HS 8-SOIC
標準包裝: 2,500
類型: 收發(fā)器
驅動器/接收器數: 1/1
規(guī)程: RS422,RS485
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOICN
包裝: 帶卷 (TR)
6
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a point-
to-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (any
combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 spec requires that
drivers must handle bus contention without sustaining any
damage.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as
long as 4000’, so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in
the cable by external fields.
Receiver Features
This device utilizes a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity
is
±200mV, as required by the RS422 and RS-485
specifications.
Receiver input resistance surpasses the RS-422 spec of
4k
, and meets the RS-485 “Unit Load” requirement of 12k
minimum, thereby allowing up to 32 devices on a bus.
Receiver inputs function with common mode voltages as
great as 7V outside the power supplies (i.e., +12V and -7V),
making them ideal for long networks, or industrial
applications, where induced voltages are a definite concern.
The receiver includes a “fail-safe if open” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating).
The receiver easily meets the data rate supported by the
driver, and receiver outputs are three-statable via the active
low RE input.
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER PROPAGATION DELAY
FIGURE 6A. TEST CIRCUIT
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES
Test Circuits and Waveforms (Continued)
SIGNAL
GENERATOR
R
RO
RE
A
B
+1.5V
15pF
RO
3V
0V
tPLH
1.5V
VCC
0V
50%
tPHL
A
1k
VCC
GND
SW
PARAMETER
DE
A
SW
tHZ
0
+1.5V
GND
tLZ
0-1.5V
VCC
tZH
0
+1.5V
GND
tZL
0-1.5V
VCC
SIGNAL
GENERATOR
R
RO
RE
A
B
15pF
RO
3V
0V
1.5V
VOH
0V
1.5V
VOH - 0.5V
tHZ
RO
VCC
VOL
1.5V
VOL + 0.5V
tLZ
RE
OUTPUT HIGH
OUTPUT LOW
tZL
tZH
ISL81485
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