參數(shù)資料
型號(hào): ISL6531EVAL1
廠(chǎng)商: Intersil Corporation
英文描述: Dual 5V Synchronous Buck Pulse-Width Modulator (PWM) Controller for DDRAM Memory VDDQ and VTT Termination
中文描述: 雙同步降壓5V的脈寬調(diào)制(PWM)控制器,用于數(shù)據(jù)存儲(chǔ)器內(nèi)存VDDQ和VTT終端
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文件大?。?/td> 461K
代理商: ISL6531EVAL1
1
ISL6531
Dual 5V Synchronous Buck Pulse-Width
Modulator (PWM) Controller for DDRAM
Memory V
DDQ
and V
TT
Termination
The ISL6531 provides complete control and protection for
dual DC-DC converters optimized for high-performance
DDRAM memory applications. It is designed to drive low
cost N-channel MOSFETs in synchronous-rectified buck
topology to efficiently generate 2.5V V
DDQ
for powering
DDRAM memory, V
REF
for DDRAM differential signalling,
and V
TT
for signal termination. The ISL6531 integrates all of
the control, output adjustment, monitoring and protection
functions into a single package.
The V
DDQ
output of the converter is maintained at 2.5V
through an integrated precision voltage reference. The V
REF
output is precisely regulated to 1/2 the memory power
supply, with a maximum tolerance of
±
1% over temperature
and line voltage variations. V
TT
accurately tracks V
REF
.
During V2_SD sleep mode, the V
TT
output is maintained by
a low power window regulator.
The ISL6531 provides simple, single feedback loop, voltage-
mode control with fast transient response for the V
DDQ
regulator. The V
TT
regulator features internal compensation
that eases the design. It includes two phase-locked 300kHz
triangle-wave oscillators which are displaced 90
o
to minimize
interference between the two PWM regulators. The
regulators feature error amplifiers with a 15MHz gain-
bandwidth product and 6V/
μ
s slew rate which enables high
converter bandwidth for fast transient performance. The
resulting PWM duty ratio ranges from 0% to 100%.
The ISL6531 protects against overcurrent conditions by
inhibiting PWM operation. The ISL6531 monitors the current
in the V
DDQ
regulator by using the r
DS(ON)
of the upper
MOSFET which eliminates the need for a current sensing
resistor.
Ordering Information
Features
Provides V
DDQ
, V
REF
, and V
TT
voltages for one- and two-
channel DDRAM memory systems
Excellent voltage regulation
- V
DDQ
= 2.5V
±
2% over full operating range
- V
REF
=
±
1% over full operating range
- V
TT
= V
REF
±
30mV
Supports ‘S3’ sleep mode
- V
TT
is held at
regulator to minimize wake-up time
via a low power window
Fast transient response
- Full 0% to 100% duty ratio
Operates from +5V Input
V
TT
regulator internally compensated
Overcurrent fault monitor on VDD
- Does not require extra current sensing element
- Uses MOSFET’s r
DS(ON)
Drives inexpensive N-Channel MOSFETs
Small converter size
- 300kHz fixed frequency oscillator
24 Lead, SOIC or 32 Lead, 5mm
×
5mm QFN
Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
V
DDQ
, V
TT
, and VREF regulation for DDRAM memory
systems
- Main memory in AMD Athlon and K8, Pentium
III, Pentium IV, Transmeta, PowerPC, AlphaPC, and
UltraSparc based computer systems
High-power tracking DC-DC regulators
PART NUMBER
TEMP
RANGE(
o
C)
PACKAGE
PKG. DWG. #
ISL6531CB
0 to 70
24 Lead SOIC
M24.3
ISL6531CBZ
(See Note)
0 to 70
24 Lead SOIC
(Pb-free)
M24.3
ISL6531CR
0 to 70
32 Lead 5x5 QFN L32.5x5
ISL6530/31EVAL1 Evaluation Board
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb
and Pb-free soldering operations. Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
1
2
--
V
DDQ
1
--
V
Data Sheet
August 11, 2005
FN9053.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or
1-888-468-3774
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
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