參數(shù)資料
型號(hào): ISL6529A
廠商: Intersil Corporation
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Dual Regulator.Synchronous Rectified Buck PWM and Linear Power Controller
中文描述: 雙Regulator.Synchronous整流降壓PWM和線性功率控制器
文件頁(yè)數(shù): 8/15頁(yè)
文件大小: 376K
代理商: ISL6529A
8
FN9127.1
December 28, 2004
Undervoltage Protection
The FB and FB2 pins are monitored during converter
operation by two separate undervoltage (UV) comparators. If
the FB voltage drops below 51.5% of the reference voltage
(0.41V), a fault signal is generated. The internal fault logic
shuts down both regulators simultaneously when the fault
signal triggers a restart.
Figure 3 illustrates the protection feature responding to an UV
event on V
OUT1
. At time t0, VOUT1 has dropped below
51.5% of the nominal output voltage. Both outputs are quickly
shut down and the internal soft-start function begins
producing soft-start ramps. The delay interval, t0 to t3, seen
by the output is equivalent to three soft-start cycles. After a
short delay interval of 10.5ms, the fourth internal soft-start
cycle initiates a normal soft-start ramp of the output, at time
t3. Both outputs are brought back into regulation by time t4, as
long as the UV event has cleared.
Had the cause of the UV still been present after the delay
interval, the UV protection circuitry becomes active
approximately 875ms into the soft-start interval. A fault
signal could then be generated and the outputs once again
shutdown. The resulting hiccup mode style of protection
would continue to repeat indefinitely.
Output Voltage Selection
The output voltage of the PWM converter can be programmed
to any level between V
IN
(i.e. +3.3V) and the internal
reference, 0.8V. An external resistor divider is used to scale
the output voltage relative to the reference voltage and feed it
back to the inverting input of the error amplifier, see Figure 4.
CAPACITOR CURRENT
CAPACITOR CURRENT
1.5V OUTPUT
1.5V OUTPUT
FIGURE 2. TOP SCOPE TRACES ARE VOLTAGE RAMP AND
CAPACITOR CURRENT. LOWER TRACES ARE
TIME AND VOLTAGE EXPANSION OF UPPER
SCOPE TRACES.
FIGURE 3. UNDERVOLTAGE PROTECTION RESPONSE
0V
0V
TIME
V
OUT2
(2.5V)
t1
t2
t3
t0
t4
(0.5V/DIV)
V
OUT1
(1.5V)
INTERNAL SOFT-START FUNCTION
V
OUT2
(2.5V)
DELAY INTERVAL
DELAY INTERVAL
FIGURE 4. OUTPUT VOLTAGE SELECTION OF THE PWM
+
R1
C3
C
OUT1
+5V
+3.3V
V
OUT1
R4
L
OUT
ISL6529A
Q1
FB
UGATE
12VCC
COMP
R2
C1
C2
R3
5VCC
+12V
Q2
LGATE
ISL6529A
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