參數(shù)資料
型號: ISL6430
廠商: Intersil Corporation
英文描述: Single Sync Buck PWM Controller for Broadband Gateway Applications
中文描述: 單同步降壓PWM控制器,寬帶網(wǎng)關(guān)應(yīng)用
文件頁數(shù): 9/12頁
文件大?。?/td> 400K
代理商: ISL6430
6
in the normal operating load range, find the ROCSET resistor
from the equation above with:
1. The maximum rDS(ON) at the highest junction
temperature.
2. The minimum IOCSET from the specification table.
3. Determine
,
where
I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
A small ceramic capacitor should be placed in parallel with
ROCSET to smooth the voltage across ROCSET in the
presence of switching noise on the input voltage.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible using ground plane construction or single point
grounding.
Figure 5 shows the critical power components of the
converter. To minimize the voltage overshoot the
interconnecting wires indicated by heavy lines should be part
of ground or power plane in a printed circuit board. The
components shown in Figure 6 should be located as close
together as possible. Please note that the capacitors CIN
and CO each represent numerous physical capacitors.
Locate the ISL6430 within 3 inches of the MOSFETs, Q1
and Q2. The circuit traces for the MOSFETs’ gate and
source connections from the ISL6430 must be sized to
handle up to 1A peak current.
Figure 6 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
current paths on the SS PIN and locate the capacitor, Css
close to the SS pin because the internal current source is
only 10
A. Provide local VCC decoupling between VCC and
GND pins. Locate the capacitor, CBOOT as close as
practical to the BOOT and PHASE pins.
IPEAK for IPEAK IOUT MAX
()
I
() 2
+
>
PGND
LO
CO
LGATE
UGATE
PHASE
Q1
Q2
D2
FIGURE 5. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
VIN
VOUT
RETURN
ISL6430
CIN
LO
AD
FIGURE 6. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
+12V
ISL6430
SS
GND
VCC
BOOT
D1
LO
CO
VOUT
LOA
D
Q1
Q2
PHASE
+VIN
CBOOT
CVCC
CSS
FIGURE 7. VOLTAGE - MODE BUCK CONVERTER
COMPENSATION DESIGN
VOUT
OSC
REFERENCE
LO
CO
ESR
VIN
VOSC
ERROR
AMP
PWM
DRIVER
(PARASITIC)
-
REF
R1
R3
R2
C3
C2
C1
COMP
VOUT
FB
ZFB
ISL6430
ZIN
COMPARATOR
DRIVER
DETAILED COMPENSATION COMPONENTS
PHASE
VE/A
+
-
+
-
ZIN
ZFB
+
ISL6430
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