參數(shù)資料
型號: ISL59833IAZ
廠商: Intersil
文件頁數(shù): 6/15頁
文件大?。?/td> 0K
描述: IC VIDEO DRIVER TRUE SGL 16-QSOP
標(biāo)準(zhǔn)包裝: 97
應(yīng)用: 電壓反饋
輸出類型: 滿擺幅
電路數(shù): 3
-3db帶寬: 200MHz
轉(zhuǎn)換速率: 500 V/µs
電流 - 電源: 97mA
電流 - 輸出 / 通道: 80mA
電壓 - 電源,單路/雙路(±): 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 管件
產(chǎn)品目錄頁面: 1247 (CN2011-ZH PDF)
14
FN6334.1
March 5, 2007
current never exceeds ±40mA, after which the electro-
migration limit of the process will be exceeded and the part
will be damaged. This limit is set by the design of the internal
metal interconnections.
POWER DISSIPATION
With the high output drive capability of the ISL59837, it is
possible to exceed the
+150°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
ΘJA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
for sinking:
Where:
VS = Supply voltage
ISMAX = Maximum quiescent supply current
VOUT = Maximum output voltage of the application
RLOAD = Load resistance tied to ground
ILOAD = Load current
i = Number of output channels
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOAD to avoid the device
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
Strip line design techniques are recommended for the input
and output signal traces. As with any high frequency device,
a good printed circuit board layout is necessary for optimum
performance. Lead lengths should be as short as possible.
The power supply pin must be well bypassed to reduce the
risk of oscillation. For normal single supply operation, where
the VS- pin is connected to the ground plane, a single 4.7F
tantalum capacitor in parallel with a 0.1F ceramic capacitor
from VS+ to GND will suffice. This same capacitor
combination should be placed at each supply pin to ground if
split-internal supplies are to be used. In this case, the VS-
pin becomes the negative supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire-wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is also very important.
PD
MAX
T
JMAX
T
AMAX
Θ
JA
---------------------------------------------
=
(EQ. 1)
PD
MAX
V
S
I
SMAX
V
S
V
OUTi
()
+
×
V
OUT i
R
Li
-----------------
×
=
(EQ. 2)
PD
MAX
V
S
I
SMAX
V
OUTiVS
()
+
×
I
LOAD i
×
=
(EQ. 3)
ISL59833
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