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參數(shù)資料
| 型號： | ISL59448IAZ-T7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | 500MHz Triple 2:1 Gain-of-2, Multiplexing Amplifier |
| 中文描述： | TRIPLE 1-CHANNEL, VIDEO MULTIPLEXER, PDSO24 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, MO-137, QSOP-24 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 678K |
| 代理商： | ISL59448IAZ-T7 |
10
FN6160.2
March 29, 2006
Pin Descriptions
ISL59448
(24 LD QSOP)
PIN NAME
EQUIVALENT
CIRCUIT
DESCRIPTION
8
IN1A
Circuit 1
Channel 1 input for output amplifier "A"
4, 7, 9, 13, 15, 24
NIC
N
ot
I
nternally
C
onnected; it is recommended these pins be tied to ground to minimize
crosstalk.
10
IN1B
Circuit 1
Channel 1 input for output amplifier "B"
12
IN1C
Circuit 1
Channel 1 input for output amplifier "C"
5
GNDB
Circuit 4
Ground pin for output amplifier “B”
11
GNDC
Circuit 4
Ground pin for output amplifier “C”
14
S0
Circuit 2
Channel selection pin. LSB (binary logic code)
17
OUTC
Circuit 3
Output of amplifier “C”
18
OUTB
Circuit 3
Output of amplifier “B”
16
V-
Circuit 4
Negative power supply
20
OUTA
Circuit 3
Output of amplifier “A”
19
V+
Circuit 4
Positive power supply
22
ENABLE
Circuit 2
Device enable (active low) w/Internal pull-down resistor. A logic High puts device into
power-down mode with the only logic circuitry active. All logic states are preserved post
power-down. This state is not recommended for logic control where more than one MUX-
amp share the same video output line.
23
LE
Circuit 2
Device latch enable on the ISL59424. A logic high on LE will latch the last (S0, S1) logic
state. HIZ and ENABLE functions are not latched with the LE pin.
21
HIZ
Circuit 2
Output disable (active high) w/internal pull-down resistor. A logic high, puts the outputs in
a high impedance state. Use this state to control logic when more than one MUX-amp
share the same video output line.
6
IN0C
Circuit 1
Channel 0 for output amplifier "C"
3
IN0B
Circuit 1
Channel 0 for output amplifier "B"
1
IN0A
Circuit 1
Channel 0 for output amplifier "A"
2
GNDA
Circuit 4
Ground pin for output amplifier “A”
ISL59448
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