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參數(shù)資料
| 型號(hào)： | ISL59441IA-T7 |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP MULTIPLEX 900MHZ 16-QSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 應(yīng)用： | 4:1 多路復(fù)用器-放大器 |
| 電路數(shù)： | 1 |
| -3db帶寬： | 900MHz |
| 轉(zhuǎn)換速率： | 1927 V/µs |
| 電流 - 電源： | 17mA |
| 電流 - 輸出 / 通道： | 180mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-QSOP |
| 包裝： | 帶卷 (TR) |
11
FN6163.2
September 21, 2005
PC Board Layout
The frequency response of this circuit depends greatly on
the care taken in designing the PC board. The following are
recommendations to achieve optimum high frequency
performance from your PC board.
The use of low inductance components such as chip
resistors and chip capacitors is strongly recommended.
Minimize signal trace lengths. Trace inductance and
capacitance can easily limit circuit performance. Avoid
sharp corners, use rounded corners when possible. Vias
in the signal lines add inductance at high frequency and
should be avoided. PCB traces greater than 1" begin to
exhibit transmission line characteristics with signal rise/fall
times of 1ns or less. High frequency performance may be
degraded for traces greater than one inch, unless strip
lines are used.
Match channel-channel analog I/O trace lengths and
layout symmetry. This will minimize propagation delay
mismatches.
Maximize use of AC de-coupled PCB layers. All signal I/O
lines should be routed over continuous ground planes (i.e.
no split planes or PCB gaps under these lines). Avoid vias
in the signal I/O lines.
Use proper value and location of termination resistors.
Termination resistors should be as close to the device as
possible.
When testing use good quality connectors and cables,
matching cable types and keeping cable lengths to a
minimum.
Minimum of 2 power supply de-coupling capacitors are
recommended (1000pF, 0.01F) as close to the device as
possible. Avoid vias between the cap and the device
because vias add unwanted inductance. Larger caps can
be farther away. When vias are required in a layout, they
should be routed as far away from the device as possible.
The NIC pins are placed on both sides of the input pins.
These pins are not internally connected to the die. It is
recommended these pins be tied to ground to minimize
crosstalk.
ISL59441
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL59441IAZ | 功能描述:視頻放大器 ISL8200M EVALRD 1 23LD RHS COMPLIA RoHS:否 制造商:ON Semiconductor 通道數(shù)量:4 電源類型: 工作電源電壓:3.3 V, 5 V 電源電流: 最小工作溫度: 最大工作溫度: 封裝 / 箱體:TSSOP-14 封裝:Reel |
| ISL59441IAZ-T13 | 制造商:Intersil Corporation 功能描述:ANLG MUX/AMP SGL 4:1 5.5V 16QSOP - Tape and Reel 制造商:Intersil 功能描述:ISL8104 EVALRD 2 16LD RHS COMPLIA |
| ISL59441IAZ-T7 | 制造商:Intersil Corporation 功能描述:ANLG MUX/AMP SGL 4:1 5.5V 16QSOP - Tape and Reel 制造商:Intersil 功能描述:ISL8120 EVALRD 3 RHS CMPL -1 CON |
| ISL59442 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1GHz, 4 x 1 Multiplexing Amplifier |
| ISL59442_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1GHz, 4 x 1 Multiplexing Amplifier |
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