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參數(shù)資料
| 型號(hào)： | ISL5861IBZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 3/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | CONV D/A 12-BIT HS 28-SOIC |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 120mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 150M |
11
Propagation Delay
The converter requires two clock rising edges for data to be
represented at the output. Each rising edge of the clock
captures the present data word and outputs the previous
data. The propagation delay is therefore 1/CLK, plus <2ns of
processing. See Figure 15.
Test Service
Intersil offers customer-specific testing of converters with a
service called Testdrive. To submit a request, fill out the
Testdrive form. The form can be found by doing an ‘entire
site search’ at www.intersil.com on the words ‘DAC
Testdrive’. Or, send a request to the technical support center.
FIGURE 13. OUTPUT LOADING FOR DATASHEET
MEASUREMENTS
PIN 21
PIN 22
RDIFF
ISL5861
RLOAD
IOUTB
IOUTA
VOUT = (2 x IOUTA x REQ)V
LOAD SEEN BY THE TRANSFORMER
RLOAD REPRESENTS THE
1:1
REQ = 0.5 x (RLOAD // RDIFF)
AT EACH OUTPUT
FIGURE 14. ALTERNATIVE OUTPUT LOADING
PIN 21
PIN 22
ISL5861
IOUTB
IOUTA
VOUT = (2 x IOUTA x REQ)V
REQ = 0.5 x (RLOAD // RDIFF// RA), WHERE RA=RB
AT EACH OUTPUT
RLOAD
RDIFF
RA
RB
LOAD SEEN BY THE TRANSFORMER
RLOAD REPRESENTS THE
Timing Diagram
FIGURE 15. PROPAGATION DELAY, SETUP TIME, HOLD TIME AND MINIMUM PULSE WIDTH DIAGRAM
CLK
IOUT
50%
tPW1
tPW2
tSU
tHLD
tSU
tPD
tHLD
D11-D0
W0
W1
W2
W3
OUTPUT=W0
OUTPUT=W1
tPD
OUTPUT=W-1
ISL5861
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