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| 型號： | ISL58328CIZ-T7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 380K |
| 描述： | IC LASER PWR MONITOR 5V 9CSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 傳感器類型： | 光學(xué) |
| 輸出類型： | 電壓 |
| 其它名稱： | ISL58328CIZ-T7DKR ISL58328CIZ-T7TRDKR ISL58328CIZ-T7TRDKR-ND |
ISL58328
8
FN6329.2
July 29, 2013
Output Configuration
The ISL58328 has two differential outputs: OUTP is a positive
and OUTN is a negative swing output. OUTP and OUTN outputs
are referenced to VREF. VREF can be externally supplied or
internally generated 2.1V. With respect to the input optical
signal, OUTP swings up from reference voltage and OUTN swings
down from reference voltage. Both OUTP and OUTN have the
same linear output dynamic range up to 1.4V swing from
reference voltage. When using external reference voltage, users
need to adjust gain registers to set proper channel gain to
prevent output saturation. To use ISL58328 as a single-ended
output, users can take either OUTP or OUTN signal and load
another output with equivalent resistor and capacitor load to
keep both outputs with the same load condition. However, it
wont be an issue to leave another output floating. When using
ISL58328 as a single-ended output device, external reference
voltage is necessary because the VREF pin doesnt have strong
driving capability. It is not recommended to use VREF as a
reference source to drive other devices. To obtain the best signal
quality at the input of the AFE or video processor, it is
recommended to keep OUTP and OUTN traces in parallel and to
keep them with same length, same width, and route. If output
signals from ISL58328 need to travel through a flex cable to AFE
or video processor, to match with the impedance of flex cable, a
50?serial termination resistor close to OUTP and OUTN output
pins may be necessary; thus the best value should be determined
according to the actual application.
Slow Tail Compensation
Photons at longer wavelength will penetrate deeper into the
photo detector structure than shorter wavelengths. It takes
longer for electron-hole pairs to become photo current and
results in a longer tail for the pulse output, called slow tail.
Longer wavelength light such as 638nm or IR has more visible
slow tail effect than blue laser. To minimize the slow tail effect,
ISL58328 has incorporated Intersils proprietary slow tail
compensation technology. There are three registers for slow tail
compensation adjustment for each wavelength (such as 638nm,
532nm, and 445nm). The slow tail compensation function is not
limited to the specific wavelength listed previously; it is used in
conjunction with the selected fine gain registers. Users can
disable slow tail compensation by setting Bit 7 (MSB) of the
register to 0 . This function can also be used to improve the
quality of pulse output waveforms due to impedance mismatch
from OEIC outputs to the flex connector. One example is to
improve Tr/Tf or to minimize overshoot.
Layout Consideration
When using differential output, layout OUTP and OUTN traces
next to each other and ground traces should be placed to other
side of OUTP and OUTN traces. When using single-ended, layout
reference trace needs to be next to output signal trace and layout
a ground trace at the other side ofthe output. For best result, dual
layer flex with signal on one side and ground plane on other side
is a must.
Reference Voltage
The ISL58328 has a reference voltage generator intended to
generate 2.1V reference voltage for all circuit blocks. Output is
biased at internal reference voltage automatically when VREF pin
is left floating. When a DC voltage is applied to VREF pin, OUTP
and OUTN will be biased at external reference automatically.
External reference is limited to a range from 1.5V to 2.5V. Using
voltage outside of this range will yield distorted outputs. When
using external reference voltage, good decoupling is very
important to prevent noise coupling into VREF. A 0.1礔 ceramic
capacitor placed as close to VREF pin as possible is
recommended to decouple VREF to ground.
Power Supply Decoupling
Due to the current being switched rapidly at OUTP and OUTN, it is
important to ensure that the power supply is well decoupled to
ground. During output switching, the V
DD
undergoes severe
current transients, thus every effort should be made to decouple
the V
DD
as close to the package as possible.
Without proper power supply decoupling there could make poor
rise/fall times, overshoot, and poor settling response.
OUTP
OUTN
> 1V
>1V
OFFSET < 50mV
V
REF
= 2.1V
FIGURE 2. OUTP/OUTN
Above minimal of 1V, linearity is no longer
guaranteed
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