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參數(shù)資料
| 型號： | ISL55143IRZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COMP CMOS HS 18V 36-TQFN |
| 標(biāo)準(zhǔn)包裝： | 4,000 |
| 類型： | 窗口 |
| 元件數(shù)： | 4 |
| 電壓 - 電源，單路/雙路(±)： | 10 V ~ 18 V |
| 電壓 - 輸入偏移（最小值）： | 50mV @ -3V，12V |
| 電流 - 輸入偏壓（最小值）： | 0.025µA @ -3V，12V |
| 電流 - 靜態(tài)（最大值）： | 12.5mA |
| 傳輸延遲（最大）： | 15ns |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 36-WFQFN 裸露焊盤 |
| 安裝類型： | 表面貼裝 |
| 包裝： | 帶卷 (TR) |
9
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6230.3
April 4, 2013
FIGURE 11. PROPAGATION DELAY @ 14V VCC-VEE
FIGURE 12. MINIMUM PULSE WIDTH RESPONSE
Typical Performance Curves Device installed on Intersil ISL55141, ISL55142, ISL55143 Evaluation Boards. (Continued)
15.0
13.5
12.0
10.5
9.0
7.5
6.0
4.5
3.0
1.5
0
0.05 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50
VINP INPUT OFFSET ±1.5 VOLT REFERENCE
-tpd DELAY
DE
L
A
Y
(ns
)
+tpd DELAY
tPDLH
tPDHL
0
10ns/DIV
0.
5V/
D
IV
1.
0V/
D
IV
VCC 15.0
VEE - 3.0
ISL55141, ISL55142, ISL55143
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