6 FN6969.1 September 19, 2013 Positive Supply Current, IDD V
參數(shù)資料
型號(hào)： ISL54224IRUZ-T7A
廠商： Intersil
文件頁(yè)數(shù)： 15/18頁(yè)
文件大?。?/td> 0K
描述： IC MULTIPLEXER DUAL 2:1 10UTQFN
標(biāo)準(zhǔn)包裝： 1
功能： 多路復(fù)用器
電路： 2 x 2:1
導(dǎo)通狀態(tài)電阻： 20 歐姆
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 5.25 V
電流 - 電源： 45µA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 10-UFQFN
供應(yīng)商設(shè)備封裝： 10-UTQFN（1.8x1.40）
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： ISL54224IRUZ-T7ADKR
ISL54224
6
FN6969.1
September 19, 2013
Positive Supply Current, IDD
VDD = 3.6V, SEL = 1.4V, OE/ALM = 0V or 1.4V
25
-
25
32
A
Full
-
38
A
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VSELL,
VOE/ALML
VDD = 2.7V to 3.6V
Full
-
0.5
V
Input Voltage High, VSELH,
VOE/ALMH
VDD = 2.7V to 3.6V
Full
1.4
-
5.25
V
Input Voltage Low, VSELL,
VOE/ALML
VDD = 3.7V to 4.2V
Full
-
0.7
V
Input Voltage High, VSELH,
VOE/ALMH
VDD = 3.7V to 4.2
Full
1.7
--
V
Input Voltage Low, VSELL,
VOE/ALML
VDD = 4.3V to 5.25V
Full
-
0.8
V
Input Voltage High, VSELH,
VOE/ALMH
VDD = 4.3V to 5.25V
Full
2.0
--
V
Input Current, ISELL, IOE/ALML VDD = 5.25V, SEL = 0V, OE/ALM = 0V
Full
-
2
-
nA
Input Current, ISELH
VDD = 5.25V, SEL = 5.25V, 4M pull-down resistor
Full
-
1.4
-
A
Input Current, IOE/ALMH
VDD = 5.25V, OE/ALM = 5.25V, 4M pull-down resistor
Full
-
1.4
-
A
NOTES:
10. VLOGIC = Input voltage to perform proper function.
11. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
12. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested
13. Flatness is defined as the difference between maximum and minimum value of ON-resistance over the specified analog signal range
14. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON value,
between HSD2+ and HSD2- or between HSD1+ and HSD1-.
15. Limits established by characterization and are not production tested.
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 3A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 3B. TEST CIRCUIT
FIGURE 3. SWITCHING TIMES
Electrical Specifications - 2.7V to 5.25V Supply Test Conditions: VDD = +3.3V, GND = 0V, VSELH = 1.4V, VSELL = 0.5V,
VOE/ALMH =1.4V, VOE/ALML = 0.5V, (Note 10), Unless Otherwise Specified.
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 11, 12) TYP
MAX
(Notes 11, 12) UNITS
50%
tr < 20ns
tf < 20ns
tOFF
90%
VDD
0V
VINPUT
0V
tON
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
90%
VOUT
V
OUT
V
(INPUT)
R
L
R
L
r
ON
+
------------------------
=
SWITCH
INPUT
VIN
VOUT
RL
CL
Dx
HSDxx
SEL
GND
VDD
C
OE/ALM
VINPUT
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