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參數(shù)資料
| 型號： | ISL54061EVAL1Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVALUATION BOARD FOR ISL54061 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，模擬開關(guān) |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ISL54061 |
| 主要屬性： | 2 x SPST 模擬開關(guān) |
| 次要屬性： | 1.8 V ~ 6.5 V 電源 |
| 已供物品： | 板 |
10
FN6580.2
November 3, 2009
Power-Supply Considerations
The ISL54060 and ISL54061 construction is typical of most
single supply CMOS analog switches, in that they have two
supply pins: V+ and GND. V+ and GND drive the internal
CMOS switches and set their analog voltage limits. Unlike
switches with a 5.5V maximum supply voltage, the ISL54060
and ISL54061 have a 6.5V maximum supply voltage
providing plenty of head room for the 10% tolerance of 5V
supplies due to overshoot and noise spikes.
The minimum recommended supply voltage is 1.8V. It is
important to note that the input signal range, switching times,
and ON-resistance degrade at lower supply voltages. Refer
to the “Electrical Specifications” tables, beginning on page 4,
and “Typical Performance Curves”, beginning on page 11,
for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to V+ and
GND signals levels to drive the analog switch gate terminals.
A high frequency decoupling capacitor placed as close to the
V+ and GND pin as possible is recommended for proper
operation of the switch. A value of 0.1F is highly
recommended.
Negative Signal Swing Capability
The ISL54060 and ISL54061 contains circuitry that allows
the analog switch signal to swing below ground. The device
has an analog signal range of 6.5V below V+ up to the V+
For example, if V+ = 5V, then the analog input signal range is
from -1.5V to +5V. If V+ = 2.7V then the range is from -3.8V
to +2.7V.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.45V VOLMAX
and 1.35V VOHMIN) over a supply range of 1.8V to 3.3V
is still below the 1.8V CMOS guaranteed low output
maximum level of 0.45V, but noise margin is reduced. At
3.3V the VIH level is 1.4V minimum. While this is above the
1.8V CMOS guaranteed high output minimum of 1.35V
under most operating conditions the switch will recognize
this as a valid logic high.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation. The ISL54060, ISL54061
has been designed to minimize the supply current whenever
the digital input voltage is not driven to the supply rails (0V to
V+). For example driving the device with 2.85V logic high
while operating with a 4.2V supply the device draws only
1A of current.
High-Frequency Performance
In 50
Ω systems, the ISL54060, ISL54061 has an ON switch
-3dB bandwidth of 60MHz (see Figure 18). The frequency
response is very consistent over a wide V+ range, and for
varying analog signal levels.
An OFF switch acts like a capacitor across the open
terminals and AC couples higher frequencies, resulting in
signal feed-through from a switch’s input to its output.
Off-Isolation is the resistance to this feed-through. Crosstalk
indicates the amount of feed-through from one switch
channel to another switch channel. Figure 19 details the high
Off-Isolation and Crosstalk rejection provided by this part. At
100kHz, Off-Isolation is about 60dB in 50
Ω systems,
decreasing approximately 20dB per decade as frequency
increases. At 1MHz, Crosstalk is about -75dB in 50
Ω
systems, decreasing approximately 20dB per decade as
frequency increases.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin, V+ and GND. One of these
diodes conducts if any analog signal exceeds the
recommended analog signal range.
Virtually all the analog switch leakage current comes from
the ESD diodes and reversed biased junctions in the switch
cell. Although the ESD diodes on a given signal pin are
identical and therefore fairly well balanced, they are reverse
biased differently. Each is biased to either the +Ring or -Ring
and the analog input signal. This means their leakages will
vary as the signal varies. The difference in the two diode
leakages to the +Ring or -Ring and the reverse biased
junctions at the internal switch cell constitutes the
analog-signal-path leakage current.
ISL54060, ISL54061
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| ISL54061IRTZ | 功能描述:IC SWITCH DUAL SPST 10TDFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:36 系列:- 功能:多路復(fù)用器 電路:2 x 4:1 導(dǎo)通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:20-SOIC W 包裝:管件 |
| ISL54061IRTZ-T | 功能描述:IC SWITCH DUAL SPST 10TDFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:36 系列:- 功能:多路復(fù)用器 電路:2 x 4:1 導(dǎo)通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:20-SOIC W 包裝:管件 |
| ISL54061IRUZ-T | 功能描述:IC SWITCH DUAL SPST 10UTQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:36 系列:- 功能:多路復(fù)用器 電路:2 x 4:1 導(dǎo)通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:20-SOIC W 包裝:管件 |
| ISL54062 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Negative Signal Swing, Sub-ohm, Dual SPDT |
| ISL54062_0911 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Negative Signal Swing, Sub-ohm, Dual SPDT |
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